View Future GrowthSocionext 과거 순이익 실적과거 기준 점검 1/6Socionext은 연평균 3.3%의 비율로 수입이 증가해 온 반면, Semiconductor 산업은 수입이 1.8% 증가했습니다. 매출은 연평균 6.9%의 비율로 증가했습니다. Socionext의 자기자본이익률은 6.6%이고 순이익률은 4.3%입니다.핵심 정보3.29%순이익 성장률3.17%주당순이익(EPS) 성장률Semiconductor 산업 성장률27.66%매출 성장률6.86%자기자본이익률6.56%순이익률4.35%최근 순이익 업데이트31 Mar 2026최근 과거 실적 업데이트공시 • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026공시 • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026공시 • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025공시 • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025공시 • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025모든 업데이트 보기Recent updates공시 • Apr 29Socionext Inc., Annual General Meeting, Jun 25, 2026Socionext Inc., Annual General Meeting, Jun 25, 2026.공시 • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026공시 • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026공시 • Oct 28Socionext Unveils Flexlets, A Configurable Chiplet Ecosystem to Accelerate Multi-Die Silicon InnovationSocionext Inc. introduced "Flexlets", a new class of configurable chiplets designed to advance heterogenous integration. As traditional monolithic SoC designs face physical and economic limits--reticle size constraints, yield challenges, and thermal bottlenecks- the industry is turning toward chiplet-based design, where designers can integrate their core features and interface functionalities, provided as chiplets, into a packaged device to improve performance, cost, and accelerate time-to-market. While chiplet technology opens exciting possibilities for modular designs and scalability, many current solutions are derived from fixed-function ASSPs, limiting flexibility and customization. Socionext's Flexlets overcome this by offering a configurable library of chiplet designs at the RTL level. Customers have the option to customize their designs at the RTL level to meet specific application requirements. Engineering samples of the initial Flexlet base designs, including Known Good Die (KGD), are currently in development. Socionext will initiate its first customer design this year and broaden design engagements beginning in Second Quarter calendar year 2026. Memory Expansion Flexlets: Scalable memory solutions with support for the latest DDR/LPDDR standards connected to either UCIe-S or UALink; Ethernet Controller Flexlets: Robust and high-performance networking connectivity via 224G/UE bridged to UCIe 2.0; PCIe Controller Flexlets: Seamless integration to PCIe ecosystem by bridging PCIe Gen7 128G PHY to UCIe 2. 0 with configurable lanes; Hybrid PCIe + Ethernet Controller Flexlets: A versatile range of I/O capabilities, bridging high-speed SerDes (224G/UE) to UCIe 2.2.0. All Flexlets support 2.5D/3D advanced packaging, including CoWoS, SoW-X, EMIB, and 3D stacking, process nodes (5, 3, 2nm), and industry standards, including UCIe, UALink, PCIe Gen7, and Ultra Ethernet - enabling robust interoperability across multi-vendor ecosystems. Socionext's packaging capabilities rival those of the largest chipmakers. With successful tapeouts in 2nm and 3DIC test vehicles, company offer real-world proof of engineering excellence, including support of multiple - 64 to 128 - instances of high-speed 224G SerDes in a Flexlet. In a market still lacking standardized design rule checks for large chiplet-based packages, Socionext provides the credibility and capability customers need to innovate with confidence.공시 • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025공시 • Aug 28Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging PortfolioSocionext announced the availability of 3DIC support in its portfolio of well-proven capabilities for the delivery of complete solutions for consumer, AI, and HPC data center applications that include chiplets, 2.5D, 3D, and 5.5D packaging. Socionext empowers customers with a proven development process and unmatched expertise delivering high-performance, high-quality solutions that accelerate innovation and success. As a key milestone, Socionext has successfully taped out a complete packaged device leveraging TSMC's SoIC-X 3D stacking. The design combines an N3 compute die and an N5 I/O die in a face-to-face (F2F) configuration. The F2F 3D stacking approach minimizes interconnect distance, significantly reduces signal latency and power consumption compared to traditional 2D and 2.5D designs. Building on the company's experience in 2.5D designs, Socionext applies proven design experience and methodologies to 3DICs, which stack components vertically to unlock key advantages: View the 3DIC F2F and 5.5D Structure; Heterogeneous Integration: 3D ICs enable the integration of different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) into a single package, allowing for a more optimally partitioned solution addressing performance, density, and cost; Higher Integration Density for a Broader Range of Applications; vertical stacking enables greater functionality in a smaller footprint--an essential advantage as traditional scaling nears its limits. This is especially valuable for space-constrained consumer devices; Improved Performance; Shorter, wider connections between dies reduce latency and boost bandwidth; Lower Power consumption; Compact interconnects result in reduced drive requirements due to lower impedance. A Vision for the Future: The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration, bringing together multiple functions within a unified system of semiconductors and packaging elements. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.공시 • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025공시 • Apr 28+ 1 more updateSocionext Inc., Annual General Meeting, Jun 26, 2025Socionext Inc., Annual General Meeting, Jun 26, 2025.공시 • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025매출 및 비용 세부 내역Socionext가 돈을 벌고 사용하는 방법. 최근 발표된 LTM 실적 기준.순이익 및 매출 추이OTCPK:SOCN.F 매출, 비용 및 순이익 (JPY Millions)날짜매출순이익일반관리비연구개발비31 Mar 26200,8348,73377,423031 Dec 25185,4117,90878,672030 Sep 25176,56310,07218,83159,82130 Jun 25170,30512,48778,061031 Mar 25188,53519,60019,09859,82131 Dec 24196,87222,30878,962030 Sep 24203,43922,42724,07453,27930 Jun 24212,58225,75677,222031 Mar 24221,24626,13421,21453,27931 Dec 23223,56424,81723,80349,32430 Sep 23226,98825,04323,03349,32430 Jun 23214,28022,65720,17049,32431 Mar 23192,76719,76317,81049,32431 Mar 22117,0097,48058,795031 Mar 2199,7461,46954,9690양질의 수익: SOCN.F의 비현금 수익 수준이 높습니다.이익 마진 증가: SOCN.F의 현재 순 이익률 (4.3%)은 지난해 (10.4%)보다 낮습니다.잉여현금흐름 대비 순이익 분석과거 순이익 성장 분석수익추이: SOCN.F의 수익은 지난 5년 동안 연평균 3.3% 증가했습니다.성장 가속화: SOCN.F은 지난 1년 동안 수익이 감소하여 5년 평균과 비교할 수 없습니다.수익 대 산업: SOCN.F은 지난 1년 동안 수익이 감소(-55.4%)하여 Semiconductor 업계 평균(18.7%)과 비교하기 어렵습니다.자기자본이익률높은 ROE: SOCN.F의 자본 수익률(6.6%)은 낮음으로 평가됩니다.총자산이익률투하자본수익률우수한 과거 실적 기업을 찾아보세요7D1Y7D1Y7D1YSemiconductors 산업에서 과거 실적이 우수한 기업.View Financial Health기업 분석 및 재무 데이터 상태데이터최종 업데이트 (UTC 시간)기업 분석2026/05/26 20:42종가2026/05/22 00:00수익2026/03/31연간 수익2026/03/31데이터 소스당사의 기업 분석에 사용되는 데이터는 S&P Global Market Intelligence LLC에서 제공됩니다. 아래 데이터는 이 보고서를 생성하기 위해 분석 모델에서 사용됩니다. 데이터는 정규화되므로 소스가 제공된 후 지연이 발생할 수 있습니다.패키지데이터기간미국 소스 예시 *기업 재무제표10년손익계산서현금흐름표대차대조표SEC 양식 10-KSEC 양식 10-Q분석가 컨센서스 추정치+3년재무 예측분석가 목표주가분석가 리서치 보고서Blue Matrix시장 가격30년주가배당, 분할 및 기타 조치ICE 시장 데이터SEC 양식 S-1지분 구조10년주요 주주내부자 거래SEC 양식 4SEC 양식 13D경영진10년리더십 팀이사회SEC 양식 10-KSEC 양식 DEF 14A주요 개발10년회사 공시SEC 양식 8-K* 미국 증권에 대한 예시이며, 비(非)미국 증권에는 해당 국가의 규제 서식 및 자료원을 사용합니다.별도로 명시되지 않는 한 모든 재무 데이터는 연간 기간을 기준으로 하지만 분기별로 업데이트됩니다. 이를 TTM(최근 12개월) 또는 LTM(지난 12개월) 데이터라고 합니다. 자세히 알아보기.분석 모델 및 스노우플레이크이 보고서를 생성하는 데 사용된 분석 모델에 대한 자세한 내용은 당사의 Github 페이지에서 확인하실 수 있습니다. 또한 보고서 활용 방법에 대한 가이드와 YouTube 튜토리얼도 제공합니다.Simply Wall St 분석 모델을 설계하고 구축한 세계적 수준의 팀에 대해 알아보세요.산업 및 섹터 지표산업 및 섹터 지표는 Simply Wall St가 6시간마다 계산하며, 프로세스에 대한 자세한 내용은 Github에서 확인할 수 있습니다.분석가 소스Socionext Inc.는 5명의 분석가가 다루고 있습니다. 이 중 5명의 분석가가 우리 보고서에 입력 데이터로 사용되는 매출 또는 수익 추정치를 제출했습니다. 분석가의 제출 자료는 하루 종일 업데이트됩니다.분석가기관Takero FujiwaraCitigroup IncHiroshi TaguchiMacquarie ResearchKazuo YoshikawaMorgan Stanley2명의 분석가 더 보기
공시 • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026
공시 • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026
공시 • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025
공시 • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025
공시 • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025
공시 • Apr 29Socionext Inc., Annual General Meeting, Jun 25, 2026Socionext Inc., Annual General Meeting, Jun 25, 2026.
공시 • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026
공시 • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026
공시 • Oct 28Socionext Unveils Flexlets, A Configurable Chiplet Ecosystem to Accelerate Multi-Die Silicon InnovationSocionext Inc. introduced "Flexlets", a new class of configurable chiplets designed to advance heterogenous integration. As traditional monolithic SoC designs face physical and economic limits--reticle size constraints, yield challenges, and thermal bottlenecks- the industry is turning toward chiplet-based design, where designers can integrate their core features and interface functionalities, provided as chiplets, into a packaged device to improve performance, cost, and accelerate time-to-market. While chiplet technology opens exciting possibilities for modular designs and scalability, many current solutions are derived from fixed-function ASSPs, limiting flexibility and customization. Socionext's Flexlets overcome this by offering a configurable library of chiplet designs at the RTL level. Customers have the option to customize their designs at the RTL level to meet specific application requirements. Engineering samples of the initial Flexlet base designs, including Known Good Die (KGD), are currently in development. Socionext will initiate its first customer design this year and broaden design engagements beginning in Second Quarter calendar year 2026. Memory Expansion Flexlets: Scalable memory solutions with support for the latest DDR/LPDDR standards connected to either UCIe-S or UALink; Ethernet Controller Flexlets: Robust and high-performance networking connectivity via 224G/UE bridged to UCIe 2.0; PCIe Controller Flexlets: Seamless integration to PCIe ecosystem by bridging PCIe Gen7 128G PHY to UCIe 2. 0 with configurable lanes; Hybrid PCIe + Ethernet Controller Flexlets: A versatile range of I/O capabilities, bridging high-speed SerDes (224G/UE) to UCIe 2.2.0. All Flexlets support 2.5D/3D advanced packaging, including CoWoS, SoW-X, EMIB, and 3D stacking, process nodes (5, 3, 2nm), and industry standards, including UCIe, UALink, PCIe Gen7, and Ultra Ethernet - enabling robust interoperability across multi-vendor ecosystems. Socionext's packaging capabilities rival those of the largest chipmakers. With successful tapeouts in 2nm and 3DIC test vehicles, company offer real-world proof of engineering excellence, including support of multiple - 64 to 128 - instances of high-speed 224G SerDes in a Flexlet. In a market still lacking standardized design rule checks for large chiplet-based packages, Socionext provides the credibility and capability customers need to innovate with confidence.
공시 • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025
공시 • Aug 28Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging PortfolioSocionext announced the availability of 3DIC support in its portfolio of well-proven capabilities for the delivery of complete solutions for consumer, AI, and HPC data center applications that include chiplets, 2.5D, 3D, and 5.5D packaging. Socionext empowers customers with a proven development process and unmatched expertise delivering high-performance, high-quality solutions that accelerate innovation and success. As a key milestone, Socionext has successfully taped out a complete packaged device leveraging TSMC's SoIC-X 3D stacking. The design combines an N3 compute die and an N5 I/O die in a face-to-face (F2F) configuration. The F2F 3D stacking approach minimizes interconnect distance, significantly reduces signal latency and power consumption compared to traditional 2D and 2.5D designs. Building on the company's experience in 2.5D designs, Socionext applies proven design experience and methodologies to 3DICs, which stack components vertically to unlock key advantages: View the 3DIC F2F and 5.5D Structure; Heterogeneous Integration: 3D ICs enable the integration of different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) into a single package, allowing for a more optimally partitioned solution addressing performance, density, and cost; Higher Integration Density for a Broader Range of Applications; vertical stacking enables greater functionality in a smaller footprint--an essential advantage as traditional scaling nears its limits. This is especially valuable for space-constrained consumer devices; Improved Performance; Shorter, wider connections between dies reduce latency and boost bandwidth; Lower Power consumption; Compact interconnects result in reduced drive requirements due to lower impedance. A Vision for the Future: The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration, bringing together multiple functions within a unified system of semiconductors and packaging elements. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.
공시 • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025
공시 • Apr 28+ 1 more updateSocionext Inc., Annual General Meeting, Jun 26, 2025Socionext Inc., Annual General Meeting, Jun 26, 2025.
공시 • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025