공시 • Jun 09
Onsemi Introduces Elite Pairing Studio to Simplify Power Design Onsemi had introduced the Elite Pairing Studio, an online design environment that simplifies pairing SiC MOSFETs and gate drivers for demanding power electronics applications, including AI data centers, electric vehicles, and industrial systems. The Elite Pairing Studio serves as the front door to onsemi’s broader suite of design tools, enabling a seamless path to system-level evaluation of performance, efficiency, and thermal behavior. The onsemi Elite Pairing Studio is an industry-first online design tool that enables engineers to move beyond traditional component-level selection to quickly identify recommended combinations of silicon carbide (SiC) MOSFETs and gate drivers based on their specific requirements. The interactive tool makes it easier to evaluate pairing behavior and trade-offs, helping accelerate the development of power electronics designs. It also serves as the front door to onsemi’s broader simulation toolset for system-level performance and efficiency analysis. The onsemi Elite Pairing Studio simplifies this challenge by guiding engineers through a step-by-step process to identify the ideal combination of an onsemi gate driver and SiC MOSFET based on their requirements. Well-matched pairings can be compared quickly, helping reduce iterations and refine power architectures earlier in the development process. This reduces design risk, shortens time to market, and helps ensure systems perform as intended in real-world conditions. The cloud-based environment gives engineers access to a private and secure workspace on onsemi.com where they can use an intuitive workflow to explore device combinations based on their inputs. The tool evaluates a wide range of gate driver combinations with the selected SiC MOSFET, using transparent methods based on established industry equations and real-world performance calculations. The evaluation logic is clear and inspectable for users. Through the Elite Pairing Studio, engineers can examine key figures of merit for each pairing, including: Switching timings, Gate voltage and current (V/I) waveforms, Voltage overshoot margins relative to device ratings, Switching energy losses, such as turn-on and turn-off energy. These insights allow engineers to compare pairing trade-offs relevant to their application and gain early visibility into factors that influence electromagnetic interference behavior and reliability margins. Results are visualized through an interactive waveform viewer, enabling more informed pairing decisions before designs are advanced into full system-level simulation. Additional onsemi technologies will be added to the Elite Pairing Studio in the future. By providing well-matched pairings of SiC MOSFETs and gate drivers tailored to application needs, the onsemi Elite Pairing Studio enables earlier design decisions with a clearer understanding of switching behavior and trade-offs. Those pairing insights can then be carried forward using Studio-generated PLECS system-level simulation models and evaluated in the onsemi Elite Power Simulator to fine-tune efficiency, thermal, and loss performance. Together, this seamless development path helps designers translate early pairing insights into improved system-level efficiency and performance for demanding applications including AI data centers, electric vehicles, industrial systems, and electrification infrastructure. The onsemi Elite Pairing Studio is available now through the onsemi website and will be demonstrated at the onsemi booth (Hall 9-332) at PCIM Expo 2026 in Nuremberg, Germany. New Risk • May 24
New major risk - Share price stability The company's share price has been highly volatile over the past 3 months. It is more volatile than 90% of Swiss stocks, typically moving 8.2% a week. This is considered a major risk. Share price volatility increases the risk of potential losses in the short-term as the stock tends to have larger drops in price more frequently than other stocks. It may also indicate the stock is highly sensitive to market conditions or economic conditions rather than being sensitive to its own business performance, which may also be inconsistent. Currently, the following risks have been identified for the company: Major Risk Share price has been highly volatile over the past 3 months (8.2% average weekly change). Minor Risks Large one-off items impacting financial results. Significant insider selling over the past 3 months (CHF6.7m sold). Board Change • May 13
Insufficient new directors No new directors have joined the board in the last 3 years. The company's board is composed of: No new directors. 6 experienced directors. 2 highly experienced directors. Independent Director Bruce Kiddoo was the last director to join the board, commencing their role in 2020. The company’s insufficient board refreshment is considered a risk according to the Simply Wall St Risk Model. 공시 • May 07
Onsemi Provides Earnings Guidance for the Second Quarter of 2026 onsemi provided earnings guidance for the second quarter of 2026. For the quarter, the company expects revenue to be $1,535 million to $1,635 million, diluted Earnings Per Share to be $0.60 to $0.72. 공시 • Apr 17
ON Semiconductor Corporation to Report Q1, 2026 Results on May 04, 2026 ON Semiconductor Corporation announced that they will report Q1, 2026 results After-Market on May 04, 2026 공시 • Apr 04
ON Semiconductor Corporation, Annual General Meeting, May 14, 2026 ON Semiconductor Corporation, Annual General Meeting, May 14, 2026. Location: principal executive offices at, 5701 north pima road, scottsdale, arizona 85250, United States 
