Announcement • Jul 02
QTREX Quantum Announces Development Of Controlled-Conductivity Cryogenic Microwave Interconnect Architecture And Files U.S. Provisional Patent Application QTREX Quantum Ltd. announced the development of a controlled-conductivity cryogenic microwave interconnect architecture designed to reduce heat conduction while preserving microwave signal performance in quantum computing systems. The Company filed a U.S. Provisional Patent Application with the United States Patent and Trademark Office and the underlying technology is patent pending. The Company’s architecture is based on the intentional use of the Wiedemann–Franz Law, a fundamental law of physics linking electrical conductivity and electronic thermal conductivity in metallic conductors, with particular relevance at cryogenic temperatures. By applying this law at the materials-design level, The Company is turning conductivity into an engineering parameter for cryogenic quantum infrastructure, enabling conductive materials to be designed not only for signal transmission, but also for thermal behavior in ultra-low-temperature environments. This capability is enabled by QTREX’s control over the full materials-to-component process, from the chemistry and engineering of its manufacturing materials, through the additive manufacturing process, and into the final quantum-infrastructure component. This vertical control allows the Company to design material behavior for the specific requirements of quantum environments. In superconducting quantum computing systems, microwave control and readout signals must travel from room-temperature electronics to quantum processors operating at millikelvin temperatures inside dilution refrigerators. Each interconnect line can also become a thermal pathway, conducting unwanted heat into the coldest stages of the system. This is already a significant constraint in today’s cryogenic quantum systems and becomes increasingly critical as systems scale. QTREX has seen strong interest from industry participants exposed to this development, reflecting the fact that this approach introduces a new way of thinking about cryogenic quantum infrastructure. This interest is already moving into near-term technical evaluation, with one of the Company’s current industry collaborators expected to begin reviewing the architecture as early as next week. Announcement • Jun 19
Qtrex Quantum Successfully Produces Cryogenic Chip Carrier Using Single-Build Ame Process QTREX Quantum Ltd. has successfully produced a cryogenic chip carrier using its proprietary single-build AME process, based on a design supplied by one of the world's largest U.S.-based technology companies developing full-stack quantum computing systems. The achievement expands QTREX’s role within the quantum hardware stack into the processor-interface layer, demonstrating that the Company’s AME platform can address both signal transport and critical carrier-level functions around the quantum processor. By enabling these capabilities within a single AME architecture, QTREX believes it is opening a new category of quantum computing components and expanding its addressable opportunity across future quantum system architectures. A cryogenic chip carrier supports the quantum processor and manages signal fan-out between the processor interface and the cryogenic I/O stack. As quantum systems scale, this interface becomes increasingly important. Higher channel counts require denser routing, stronger shielding, lower thermal load, controlled signal integrity and repeatable manufacturing inside highly constrained cryogenic environments. QTREX’s carrier uses a Kapton-class polyimide architecture adapted for very low-temperature environments. The single-build AME process is designed to integrate the cryogenic chip carrier and interconnect structure into one monolithic architecture, enabling conductive pathways, dielectric structures, shielding features and direct interconnect transitions to be produced together rather than assembled through separate connectors and manual steps. By reducing connectorized transitions, the architecture is intended to lower potential failure points, simplify the signal path and support substantially higher routing density. Because shielding can be engineered directly into the carrier, and because AME enables 3D routing geometries, this approach can open a new integration path for high-channel-count quantum processors that conventional connector-based architectures are not designed to support. Following interest from multiple quantum hardware companies and strategic technology customers, the next phase is expected to focus on customer-specific cryogenic chip carrier designs tailored to each processor architecture, chip design and system-level requirement. QTREX plans to present the chip carrier sample during private meetings in Boston around Quantum.Tech World 2026, taking place on June 25–26, 2026. Announcement • Jun 10
QTREX Quantum Ltd. Receives Government Grant to Advance the World's First Native RF Dielectric Material for Quantum Computing QTREX Quantum Ltd. announced that the Israel Innovation Authority (“IIA”) has awarded the Company an approximately $1 million grant to support the development of a purpose-built dielectric material engineered for high-density, low-loss radio frequency (“RF”) signal routing in scalable superconducting quantum computing systems. QTREX’s program targets one of the core scaling constraints in superconducting quantum computing: the growing need to move more RF and microwave signals through cryogenic environments with lower loss, higher density and fewer assembly points. QTREX is developing the material as a native layer within its quantum connectivity architecture, enabling the Company to engineer the dielectric, conductor and 3D geometry together rather than adapting off-the-shelf materials to quantum requirements. This matters because in superconducting quantum systems, signal loss, impedance control, density and thermal behavior are driven by how the dielectric, conductor and geometry work together as a single structure. As superconducting quantum processors scale, connectivity becomes a system-level bottleneck across the industry. More qubits require more RF lines, tighter packaging, cleaner signal paths and lower thermal impact. This creates a clear need for purpose-built materials and monolithic connectivity components designed specifically for the physical demands of scalable quantum computing. 
