Announcement • Sep 16

Astera Labs, Inc. Announces Leo X-Series And Leo 2 E & P-Series Smart Memory Controllers

Astera Labs, Inc. announced three new memory connectivity solutions—Leo X-Series and the Leo 2 E & P-Series—extending its Leo Smart Memory Controller family across direct fabric-attached GPU memory and CPU-attached expansion and pooled/shared memory architectures. The new Leo X-Series is a fabric-attached Smart Memory Controller purpose-built to directly support AI accelerator-side memory demand. Paired with Astera Labs’ Scorpio fabric switches, using PCIe and platform-specific protocols for scaling up GPUs, Leo X-Series enables direct connectivity to AI fabrics and a dedicated memory tier for offloading KV cache and agent context. Leo X-Series provides a lower-latency and higher bandwidth path for GPU-to-KV-cache access versus architectures that rely solely on CPU-attached memory or NVMe storage tiers. Leo X-Series’ support for PCIe in addition to platform-specific custom interfaces allows hyperscalers and AI platform providers to build a customized memory companion architecture suited to their compute platform rather than a one-size-fits-all design. These capabilities are designed to improve KV-cache performance and token economics, delivering up to 62% lower TTFT and up to 22% more TPS. The enhanced Leo 2 E & P-Series provide complementary approaches to CPU-attached capacity and rack-scale memory utilization that can support AI agents, in-memory databases, and general-purpose cloud workloads. These devices support four DDR4 or DDR5 memory controllers that double memory bandwidth and capacity versus the previous generation, while an optimized chip package fits add-in cards and other designs to optimize DIMM integration density. Leo 2 E-Series provides direct CPU-attached CXL 3.2 memory expansion via PCIe 6 x16 host connectivity. It delivers additional memory capacity without requiring another CPU socket and enables infrastructure providers to redeploy previously deployed memory in new, cloud servers supporting high-volume workloads. Leo 2 P-Series enables disaggregated CXL memory architectures with pooling and sharing across hosts, supported by dual-port PCIe 6 x8 connectivity and dynamic capacity management. Hosts can draw pooled memory on demand instead of over-provisioning every server, turning stranded DRAM into a rack-level resource increasing utilization. Across the Leo family, hyperscale-grade RAS and memory-health management support reliable operation for evolving compute and memory platforms. Purpose-built memory test engines and automated repair engines help extend maximum lifetime for existing memory DIMMs, assist with pre-deployment testing, and identify reliable DIMMs for reuse. Enhanced memory error reporting, event recording, scrubbing, customizable thermal management, and resilient firmware updates help protect workloads and extend memory service life. Workload monitoring, performance profiling, hotness tracking, software-defined data placement, and latency optimization help fine-tune memory placement and access latency for long-context agentic AI and general purpose workloads. Telemetry and management integration, together with Astera Labs’ COSMOS software suite, provides fleet-wide visibility as operators combine previously deployed DDR4, newly deployed DDR5 in modern cloud server fleets, pooled, and accelerator-attached capacity across the rack. The enhanced Leo family was developed by Astera Labs in close collaboration with CPU and GPU ecosystem partners, including AMD, Arm, Intel, and major memory suppliers, alongside additional hyperscale and OEM collaborators. The family is sampling with hyperscaler customers. Astera Labs will demonstrate Leo family capabilities—including direct fabric-attached memory for Agentic AI, DDR4 reuse, dynamic memory pooling, and Agentic AI memory tiering with Scorpio X-Series—at AI Infra Summit 2026 at the Santa Clara Convention Center, September 15–17.

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Astera Labs Unveils Three New Leo Memory Controllers for AI and Cloud Workloads

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