View Future GrowthSocionext 過去の業績過去 基準チェック /16Socionextは、平均年間3.3%の収益成長を遂げていますが、 Semiconductor業界の収益は、年間 成長しています。収益は、平均年間1.8% 6.9%収益成長率で 成長しています。 Socionextの自己資本利益率は6.6%であり、純利益率は4.3%です。主要情報3.29%収益成長率3.17%EPS成長率Semiconductor 業界の成長27.66%収益成長率6.86%株主資本利益率6.56%ネット・マージン4.35%前回の決算情報31 Mar 2026最近の業績更新お知らせ • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026お知らせ • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026お知らせ • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025お知らせ • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025お知らせ • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025すべての更新を表示Recent updatesお知らせ • Apr 29Socionext Inc., Annual General Meeting, Jun 25, 2026Socionext Inc., Annual General Meeting, Jun 25, 2026.お知らせ • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026お知らせ • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026お知らせ • Oct 28Socionext Unveils Flexlets, A Configurable Chiplet Ecosystem to Accelerate Multi-Die Silicon InnovationSocionext Inc. introduced "Flexlets", a new class of configurable chiplets designed to advance heterogenous integration. As traditional monolithic SoC designs face physical and economic limits--reticle size constraints, yield challenges, and thermal bottlenecks- the industry is turning toward chiplet-based design, where designers can integrate their core features and interface functionalities, provided as chiplets, into a packaged device to improve performance, cost, and accelerate time-to-market. While chiplet technology opens exciting possibilities for modular designs and scalability, many current solutions are derived from fixed-function ASSPs, limiting flexibility and customization. Socionext's Flexlets overcome this by offering a configurable library of chiplet designs at the RTL level. Customers have the option to customize their designs at the RTL level to meet specific application requirements. Engineering samples of the initial Flexlet base designs, including Known Good Die (KGD), are currently in development. Socionext will initiate its first customer design this year and broaden design engagements beginning in Second Quarter calendar year 2026. Memory Expansion Flexlets: Scalable memory solutions with support for the latest DDR/LPDDR standards connected to either UCIe-S or UALink; Ethernet Controller Flexlets: Robust and high-performance networking connectivity via 224G/UE bridged to UCIe 2.0; PCIe Controller Flexlets: Seamless integration to PCIe ecosystem by bridging PCIe Gen7 128G PHY to UCIe 2. 0 with configurable lanes; Hybrid PCIe + Ethernet Controller Flexlets: A versatile range of I/O capabilities, bridging high-speed SerDes (224G/UE) to UCIe 2.2.0. All Flexlets support 2.5D/3D advanced packaging, including CoWoS, SoW-X, EMIB, and 3D stacking, process nodes (5, 3, 2nm), and industry standards, including UCIe, UALink, PCIe Gen7, and Ultra Ethernet - enabling robust interoperability across multi-vendor ecosystems. Socionext's packaging capabilities rival those of the largest chipmakers. With successful tapeouts in 2nm and 3DIC test vehicles, company offer real-world proof of engineering excellence, including support of multiple - 64 to 128 - instances of high-speed 224G SerDes in a Flexlet. In a market still lacking standardized design rule checks for large chiplet-based packages, Socionext provides the credibility and capability customers need to innovate with confidence.お知らせ • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025お知らせ • Aug 28Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging PortfolioSocionext announced the availability of 3DIC support in its portfolio of well-proven capabilities for the delivery of complete solutions for consumer, AI, and HPC data center applications that include chiplets, 2.5D, 3D, and 5.5D packaging. Socionext empowers customers with a proven development process and unmatched expertise delivering high-performance, high-quality solutions that accelerate innovation and success. As a key milestone, Socionext has successfully taped out a complete packaged device leveraging TSMC's SoIC-X 3D stacking. The design combines an N3 compute die and an N5 I/O die in a face-to-face (F2F) configuration. The F2F 3D stacking approach minimizes interconnect distance, significantly reduces signal latency and power consumption compared to traditional 2D and 2.5D designs. Building on the company's experience in 2.5D designs, Socionext applies proven design experience and methodologies to 3DICs, which stack components vertically to unlock key advantages: View the 3DIC F2F and 5.5D Structure; Heterogeneous Integration: 3D ICs enable the integration of different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) into a single package, allowing for a more optimally partitioned solution addressing performance, density, and cost; Higher Integration Density for a Broader Range of Applications; vertical stacking enables greater functionality in a smaller footprint--an essential advantage as traditional scaling nears its limits. This is especially valuable for space-constrained consumer devices; Improved Performance; Shorter, wider connections between dies reduce latency and boost bandwidth; Lower Power consumption; Compact interconnects result in reduced drive requirements due to lower impedance. A Vision for the Future: The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration, bringing together multiple functions within a unified system of semiconductors and packaging elements. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.お知らせ • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025お知らせ • Apr 28+ 1 more updateSocionext Inc., Annual General Meeting, Jun 26, 2025Socionext Inc., Annual General Meeting, Jun 26, 2025.お知らせ • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025収支内訳Socionext の稼ぎ方とお金の使い方。LTMベースの直近の報告された収益に基づく。収益と収入の歴史OTCPK:SOCN.F 収益、費用、利益 ( )JPY Millions日付収益収益G+A経費研究開発費31 Mar 26200,8348,73377,423031 Dec 25185,4117,90878,672030 Sep 25176,56310,07218,83159,82130 Jun 25170,30512,48778,061031 Mar 25188,53519,60019,09859,82131 Dec 24196,87222,30878,962030 Sep 24203,43922,42724,07453,27930 Jun 24212,58225,75677,222031 Mar 24221,24626,13421,21453,27931 Dec 23223,56424,81723,80349,32430 Sep 23226,98825,04323,03349,32430 Jun 23214,28022,65720,17049,32431 Mar 23192,76719,76317,81049,32431 Mar 22117,0097,48058,795031 Mar 2199,7461,46954,9690質の高い収益: SOCN.F 非現金収入 のレベルが高いです。利益率の向上: SOCN.Fの現在の純利益率 (4.3%)は、昨年(10.4%)よりも低くなっています。フリー・キャッシュフローと収益の比較過去の収益成長分析収益動向: SOCN.Fの収益は過去 5 年間で年間3.3%増加しました。成長の加速: SOCN.Fは過去 1 年間の収益成長がマイナスであったため、5 年間の平均と比較することはできません。収益対業界: SOCN.Fは過去 1 年間で収益成長率がマイナス ( -55.4% ) となったため、 Semiconductor業界平均 ( 18.7% ) と比較することが困難です。株主資本利益率高いROE: SOCN.Fの 自己資本利益率 ( 6.6% ) は 低い とみなされます。総資産利益率使用総資本利益率過去の好業績企業の発掘7D1Y7D1Y7D1YSemiconductors 、過去の業績が好調な企業。View Financial Health企業分析と財務データの現状データ最終更新日（UTC時間）企業分析2026/05/26 00:01終値2026/05/22 00:00収益2026/03/31年間収益2026/03/31データソース企業分析に使用したデータはS&P Global Market Intelligence LLC のものです。本レポートを作成するための分析モデルでは、以下のデータを使用しています。データは正規化されているため、ソースが利用可能になるまでに時間がかかる場合があります。パッケージデータタイムフレーム米国ソース例会社財務10年損益計算書キャッシュ・フロー計算書貸借対照表SECフォーム10-KSECフォーム10-Qアナリストのコンセンサス予想+プラス3年予想財務アナリストの目標株価アナリストリサーチレポートBlue Matrix市場価格30年株価配当、分割、措置ICEマーケットデータSECフォームS-1所有権10年トップ株主インサイダー取引SECフォーム4SECフォーム13Dマネジメント10年リーダーシップ・チーム取締役会SECフォーム10-KSECフォームDEF 14A主な進展10年会社からのお知らせSECフォーム8-K* 米国証券を対象とした例であり、非米国証券については、同等の規制書式および情報源を使用。特に断りのない限り、すべての財務データは1年ごとの期間に基づいていますが、四半期ごとに更新されます。これは、TTM（Trailing Twelve Month）またはLTM（Last Twelve Month）データとして知られています。詳細はこちら。分析モデルとスノーフレーク本レポートを生成するために使用した分析モデルの詳細は当社のGithubページでご覧いただけます。また、レポートの使用方法に関するガイドやYoutubeのチュートリアルも掲載しています。シンプリー・ウォールストリート分析モデルを設計・構築した世界トップクラスのチームについてご紹介します。業界およびセクターの指標私たちの業界とセクションの指標は、Simply Wall Stによって6時間ごとに計算されます。アナリスト筋Socionext Inc. 5 これらのアナリストのうち、弊社レポートのインプットとして使用した売上高または利益の予想を提出したのは、 。アナリストの投稿は一日中更新されます。5 アナリスト機関Takero FujiwaraCitigroup IncHiroshi TaguchiMacquarie ResearchKazuo YoshikawaMorgan Stanley2 その他のアナリストを表示
お知らせ • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026
お知らせ • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026
お知らせ • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025
お知らせ • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025
お知らせ • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025
お知らせ • Apr 29Socionext Inc., Annual General Meeting, Jun 25, 2026Socionext Inc., Annual General Meeting, Jun 25, 2026.
お知らせ • Mar 10Socionext Inc. to Report Fiscal Year 2026 Results on Apr 28, 2026Socionext Inc. announced that they will report fiscal year 2026 results on Apr 28, 2026
お知らせ • Dec 12Socionext Inc. to Report Q3, 2026 Results on Jan 30, 2026Socionext Inc. announced that they will report Q3, 2026 results on Jan 30, 2026
お知らせ • Oct 28Socionext Unveils Flexlets, A Configurable Chiplet Ecosystem to Accelerate Multi-Die Silicon InnovationSocionext Inc. introduced "Flexlets", a new class of configurable chiplets designed to advance heterogenous integration. As traditional monolithic SoC designs face physical and economic limits--reticle size constraints, yield challenges, and thermal bottlenecks- the industry is turning toward chiplet-based design, where designers can integrate their core features and interface functionalities, provided as chiplets, into a packaged device to improve performance, cost, and accelerate time-to-market. While chiplet technology opens exciting possibilities for modular designs and scalability, many current solutions are derived from fixed-function ASSPs, limiting flexibility and customization. Socionext's Flexlets overcome this by offering a configurable library of chiplet designs at the RTL level. Customers have the option to customize their designs at the RTL level to meet specific application requirements. Engineering samples of the initial Flexlet base designs, including Known Good Die (KGD), are currently in development. Socionext will initiate its first customer design this year and broaden design engagements beginning in Second Quarter calendar year 2026. Memory Expansion Flexlets: Scalable memory solutions with support for the latest DDR/LPDDR standards connected to either UCIe-S or UALink; Ethernet Controller Flexlets: Robust and high-performance networking connectivity via 224G/UE bridged to UCIe 2.0; PCIe Controller Flexlets: Seamless integration to PCIe ecosystem by bridging PCIe Gen7 128G PHY to UCIe 2. 0 with configurable lanes; Hybrid PCIe + Ethernet Controller Flexlets: A versatile range of I/O capabilities, bridging high-speed SerDes (224G/UE) to UCIe 2.2.0. All Flexlets support 2.5D/3D advanced packaging, including CoWoS, SoW-X, EMIB, and 3D stacking, process nodes (5, 3, 2nm), and industry standards, including UCIe, UALink, PCIe Gen7, and Ultra Ethernet - enabling robust interoperability across multi-vendor ecosystems. Socionext's packaging capabilities rival those of the largest chipmakers. With successful tapeouts in 2nm and 3DIC test vehicles, company offer real-world proof of engineering excellence, including support of multiple - 64 to 128 - instances of high-speed 224G SerDes in a Flexlet. In a market still lacking standardized design rule checks for large chiplet-based packages, Socionext provides the credibility and capability customers need to innovate with confidence.
お知らせ • Sep 12Socionext Inc. to Report Q2, 2026 Results on Oct 31, 2025Socionext Inc. announced that they will report Q2, 2026 results on Oct 31, 2025
お知らせ • Aug 28Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging PortfolioSocionext announced the availability of 3DIC support in its portfolio of well-proven capabilities for the delivery of complete solutions for consumer, AI, and HPC data center applications that include chiplets, 2.5D, 3D, and 5.5D packaging. Socionext empowers customers with a proven development process and unmatched expertise delivering high-performance, high-quality solutions that accelerate innovation and success. As a key milestone, Socionext has successfully taped out a complete packaged device leveraging TSMC's SoIC-X 3D stacking. The design combines an N3 compute die and an N5 I/O die in a face-to-face (F2F) configuration. The F2F 3D stacking approach minimizes interconnect distance, significantly reduces signal latency and power consumption compared to traditional 2D and 2.5D designs. Building on the company's experience in 2.5D designs, Socionext applies proven design experience and methodologies to 3DICs, which stack components vertically to unlock key advantages: View the 3DIC F2F and 5.5D Structure; Heterogeneous Integration: 3D ICs enable the integration of different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) into a single package, allowing for a more optimally partitioned solution addressing performance, density, and cost; Higher Integration Density for a Broader Range of Applications; vertical stacking enables greater functionality in a smaller footprint--an essential advantage as traditional scaling nears its limits. This is especially valuable for space-constrained consumer devices; Improved Performance; Shorter, wider connections between dies reduce latency and boost bandwidth; Lower Power consumption; Compact interconnects result in reduced drive requirements due to lower impedance. A Vision for the Future: The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration, bringing together multiple functions within a unified system of semiconductors and packaging elements. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.
お知らせ • Jun 11Socionext Inc. to Report Q1, 2026 Results on Jul 31, 2025Socionext Inc. announced that they will report Q1, 2026 results on Jul 31, 2025
お知らせ • Apr 28+ 1 more updateSocionext Inc., Annual General Meeting, Jun 26, 2025Socionext Inc., Annual General Meeting, Jun 26, 2025.
お知らせ • Mar 11Socionext Inc. to Report Fiscal Year 2025 Results on Apr 28, 2025Socionext Inc. announced that they will report fiscal year 2025 results on Apr 28, 2025