Annuncio • May 26
Advanced Semiconductor Engineering, Inc. Launches Automated 310Mm Panel-Level Packaging Production Line Advanced Semiconductor Engineering Inc. announced the development of an industry-first automated 310mm × 310mm panel-level packaging production line. This milestone expands economies of scale by enabling a seamless transition from wafer-level packaging to panel-level packaging while preserving design rule consistency across FOCoS and FOCoS-Bridge packaging platforms. The new panel line is expected to enter production in the first half of 2027. The automated panel-level packaging line supports 310mm × 310mm format and is compatible with advanced packaging platforms including FOCoS and FOCoS-Bridge, delivering line/space capabilities of 2/2µm and 8/8µm, respectively. By transitioning from traditional round wafers to rectangular panels, Advanced Semiconductor Engineering Inc. enables significantly greater usable area—up to 96,100 mm2 per panel—allowing for more dies per unit and improved material efficiency. This shift to panel-level packaging addresses critical industry challenges, including rising interposer sizes and declining wafer-level efficiency. The larger panel format supports higher throughput and reduced cycle time, while enabling integration of increasingly complex multi-die architectures. These benefits are especially impactful for AI data center and HPC applications, where demand for larger package sizes and higher I/O density continues to accelerate. The panel-level platform delivers higher throughput through large-area processing and reduced tool change steps, while offering a flexible foundation for heterogeneous integration and system-in-package (SiP) solutions. It supports a wide range of applications including AI, HPC, networking, high-end gaming, and edge AI, helping customers meet performance targets with greater manufacturing efficiency and faster time-to-market. The new solution also reinforces its competitive differentiation through faster cycle times, scalable manufacturing, and alignment with long-term industry roadmaps for chiplet-based architectures and large-form-factor integration. As the industry moves beyond the limitations of traditional wafer-based processes, Advanced Semiconductor Engineering Inc. continues to lead in delivering advanced packaging solutions that enable new levels of system performance and efficiency. Advanced Semiconductor Engineering Inc. will participate in the 76th IEEE Electronic Components and Technology Conference (ECTC) in Orlando, Florida, from May 26 to May 29, 2026. Annuncio • Mar 30
ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 24, 2026 ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 24, 2026, at 10:00 Taipei Standard Time. Location: chia ch`ang rd., nanzih district, kaohsiung city, Taiwan Annuncio • Oct 21
ASE Technology Holding Co., Ltd. (TWSE:3711) signed a binding Memorandum of Understanding to acquire Linear Semiconductor Sdn Bhd from Analog Devices, Inc. (NasdaqGS:ADI). ASE Technology Holding Co., Ltd. (TWSE:3711) signed a binding Memorandum of Understanding to acquire Linear Semiconductor Sdn Bhd from Analog Devices, Inc. (NasdaqGS:ADI) on October 21, 2025.
The transaction is subject to approval by regulatory board / committee and definitive agreement. The expected completion of the transaction is in the first calendar half of 2026. Annuncio • Jun 26
ASE Technology Holding Co., Ltd. Announces Directorate Changes ASE Technology Holding Co., Ltd. held its annual shareholders' meeting on June 25, 2025, where a by-election was conducted for one member of the Board of Directors. The newly elected director is Chang Dan Yao Danielle. Title and name of the previous position holder: Director/Rutherford Chang. Resume of the previous position holder: Director of the Company and Director(representative) of Advanced Semiconductor Engineering Inc. Resume of the new position holder: Director(representative), Advanced Semiconductor Engineering Inc. Director, Universal Scientific Industrial (Shanghai) Co., Ltd. Director (representative), ASE Test Inc. and Director (representative), USI Inc. Reason for the change: By-election of a new director at the Annual Shareholders' Meeting Effective date of the new appointment: June 25, 2025. Annuncio • May 03
ASE Technology Holding Co., Ltd. to Report Q1, 2025 Results on May 12, 2025 ASE Technology Holding Co., Ltd. announced that they will report Q1, 2025 results on May 12, 2025 Annuncio • Apr 01
ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 25, 2025 ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 25, 2025, at 10:00 Taipei Standard Time. Location: no,600-4, chia ch`ang rd., nanzih district, kaohsiung city Taiwan Annuncio • Feb 15
ASE Technology Holding Co., Ltd. to Report Fiscal Year 2024 Results on Feb 24, 2025 ASE Technology Holding Co., Ltd. announced that they will report fiscal year 2024 results on Feb 24, 2025 Annuncio • Feb 08
ASE Technology Holding Co., Ltd. Announces Demise of Rutherford Chang, Director ASE Technology Holding Co., Ltd. announced demise of Rutherford Chang, Director on Feb. 7, 2025. Title and name of the previous position holder: Rutherford Chang, Corporate Director of ASE Technology Holding Co., Ltd. Resume of the previous position holder: Corporate Director of ASE Technology Holding Co., Ltd. and the Director (Representative) of ASE Inc. Annuncio • Oct 30
ASE Technology Holding Co., Ltd. to Report Q3, 2024 Results on Nov 06, 2024 ASE Technology Holding Co., Ltd. announced that they will report Q3, 2024 results on Nov 06, 2024 Annuncio • Aug 02
ASE Technology Holding Co., Ltd. to Report Q2, 2024 Results on Aug 09, 2024 ASE Technology Holding Co., Ltd. announced that they will report Q2, 2024 results on Aug 09, 2024 Annuncio • Jul 25
ASE Technology Holding Co., Ltd. to Report Q2, 2024 Results on Jul 25, 2024 ASE Technology Holding Co., Ltd. announced that they will report Q2, 2024 results on Jul 25, 2024 Annuncio • Jun 27
ASE Technology Holding Co., Ltd. Approves Change of Directors Chi-Wen Tsai, Joseph Tung, Ramond Lo, TS Chen, Yen-Chun Chang ASE Technology Holding Co., Ltd. elected Andrew Tang/Group Procurement Officer of the Company, Vice Chairman and Vice CEO of Advanced Semiconductor Engineering Inc. as Director in place of Chi-Wen Tsai, Joseph Tung, Ramond Lo, TS Chen and Yen-Chun Chang. Effective date of the new appointment June 27, 2024. Annuncio • May 03
ASE Technology Holding Co., Ltd. to Report Q1, 2024 Results on May 10, 2024 ASE Technology Holding Co., Ltd. announced that they will report Q1, 2024 results on May 10, 2024 Annuncio • Mar 30
ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 26, 2024 ASE Technology Holding Co., Ltd., Annual General Meeting, Jun 26, 2024. Location: Zhuang Jing Auditorium, 600-4 Jiachang Road, Nantze District, Kaohsiung City, Taiwan Kaohiusng Taiwan Agenda: To report the Company's 2023 Business Report; To report by Audit Committee on review of the 2023 Annual Accounting Final Reports and Statements; To consider The Company's report on the 2023 distribution of employee compensation and director remuneration. Annuncio • Oct 25
ASE Technology Holding Co., Ltd. on Behalf of Subsidiary Financiere AFG Announces the Resignation of Nicolas Denis as CEO, Effective December 1, 2023 ASE Technology Holding Co., Ltd. on behalf of subsidiary Financiere AFG announced the resignation of Nicolas Denis, the legal representative of ASTEELFLASH FRANCE as CEO. Effective December 1, 2023. Annuncio • Jun 01
ASE Technology Holding Co., Ltd. Announces Cash Dividend, Payable on July 27, 2023 ASE Technology Holding Co., Ltd. announced total amount of cash dividend is TWD 38,482,082,645. Ex-rights (ex-dividend) trading date is June 30, 2023. Ex-rights (ex-dividend) record date is July 08, 2023. Payment date of cash dividend distribution is July 27, 2023. Annuncio • May 17
ASE Technology Holding Co., Ltd., Annual General Meeting, May 16, 2023 ASE Technology Holding Co., Ltd., Annual General Meeting, May 16, 2023. Agenda: To ratify the proposal of 2022 earnings distribution of ASE Inc.; and to ratify 2022 Business Report and Financial Statements of ASE Inc. Annuncio • Dec 09
ASE Technology Holding Co., Ltd.'s Subsidiary, SPIL Appoints Chi-Pin Chang as Juristic-Person Director Announcement on behalf of the subsidiary, SPIL,of the change of representative of juristic-person director. Date of occurrence of the change:2022/12/07. Name of legal person: ASE Technology Holding Co., Ltd. Name of the previous position holder: Mr. Randy Hsiao-Yu Lo. Resume of the previous position holder: Director of SPIL and President of Siliconware USA Inc. Name of the new position holder: Mr. Chi-Pin Chang. Resume of the new position holder: President of Siliconware USA Inc. Reason for the change: new appointment. Original term: 2021/04/29~2024/04/28. Effective date of the new appointment: December 7, 2022. Annuncio • Nov 04
Advanced Semiconductor Engineering, Inc. Announces FOCoS Advancements Under the VIPack Platform Advanced Semiconductor Engineering Inc. announced the industry’s first Fan-Out Chip on Substrate Chip First (FOCoS-CF) with encapsulant-separated redistribution layer (RDL) and Chip Last (FOCoS-CL) semiconductor packaging solution that elevates the performance for High Performance Computing (HPC), under the ASE VIPack platform. This progression of fan-out technology offers breakthrough board level reliability and exceptional electrical performance while meeting integration requirements for networking and artificial intelligence applications that demand greater memory and compute power. The growing demand for high density, high speed, and low latency of chip-to-chip interconnect is driving a new level of packaging innovations such as FOCoS-CF and FOCoS-CL. This combined FOCoS-CF and FOCoS-CL portfolio addresses the limitations of traditional flip-chip packages where a single SoC is assembled on a substrate by enabling multi-chip and chiplet integration where two or more chips can be reconstituted into a fan-out module and then assembled on a substrate. Encapsulant-separated RDL is a chip first technology that helps to address some of the die placement and design rule related issues seen with the traditional reconstituted wafer process technology. FOCoS-CF using encapsulant-separated RDL enables improved Chip Package Interaction (CPI), lessened mechanical stress risk over the chip edge at RDL, and better high frequency signal integrity. There are also advanced design rule improvements that enable a higher IO density by up to 10x existing by reducing pad pitches, while creating heterogeneous integration opportunities across chips from varying nodes and different fabs. Data shows that FOCoS-CL is particularly effective for High Bandwidth Memory (HBM) integration, a technology area of growing significance given its ability to optimize power efficiency and space savings. As demand for HBM continues to grow within the HPC, server, and networking markets, FOCoS-CL innovation delivers crucial performance and footprint advantages. Heterogeneous integration through advanced packaging technology enables chiplet integration with separate designs and different manufacturing process nodes within a single package. It provides advancement for greater system intelligence, better connectivity, and higher performance at a more manageable cost while delivering a compelling value proposition for yield improvement and IP reuse. ASE’s FOCoS portfolio including FOCoS-CF using encapsulant-separated RDL and FOCoS-CL, aligns with market demand as both solutions provide different chips and flip-chip devices to be packaged on a high pin count BGA substrate, allowing the system and package architects to design the optimal package integration solution for their product strategy, value proposition, and time-to-market. FOCoS packaging technology enables chiplet integration with multiple RDL interconnects up to five layers, a smaller RDL L/S of 1.5/1.5µm, and a large fan-out module size of 34x50mm2. It also provides a wide portfolio integration, such as an application-specific integrated circuit (ASIC) with high-bandwidth memory (HBM) and ASIC with Serdes across many segments of HPC, networking, artificial intelligence/machine learning (AI/ML) and the cloud. Furthermore, FOCoS has demonstrated better electrical performance and lower cost than 2.5D Si TSV because of the elimination of the Si interposer along with reducing parasitic capacitance. Annuncio • Oct 28
ASE Technology Holding Co., Ltd. to Report Q3, 2022 Results on Oct 27, 2022 ASE Technology Holding Co., Ltd. announced that they will report Q3, 2022 results on Oct 27, 2022 Annuncio • Aug 26
ASE Technology Holding Co., Ltd., Annual General Meeting, Aug 25, 2022 ASE Technology Holding Co., Ltd., Annual General Meeting, Aug 25, 2022. Annuncio • Jun 02
ASE Introduces VIPack™ to Help Transform Packaging Solution Enablement Advanced Semiconductor Engineering Inc. (ASE), a member of ASE Technology Holding Co., Ltd. introduced VIPack™, an advanced packaging platform designed to enable vertically integrated package solutions. VIPack™ represents ASE’s next generation of 3D heterogeneous integration architecture that extends design rules and achieves ultra-high density and performance. The platform leverages advanced redistribution layer (RDL) processes, embedded integration, and 2.5D and 3D technologies to help customers achieve unprecedented innovation when integrating multiple chips within a single package. ASE’s VIPack™ is comprised of six core packaging technology pillars supported by a comprehensive and integrated co-design ecosystem. These include ASE’s high density RDL-based Fanout Package-on Package (FOPoP), Fanout Chip-on-Substrate, (FOCoS), Fanout Chip-on-Substrate-Bridge (FOCoS-Bridge), and Fanout System-in-Package (FOSiP) as well as Through Silicon Via (TSV)-based 2.5D and 3D IC and Co-Packaged Optics processing capabilities. The VIPack™ platform provides the capabilities necessary to enable trailblazing highly integrated silicon packaging solutions required to optimize clock speed, bandwidth, and power delivery, and to reduce co-design time, product development, and time to market. “Critical new innovations such as double-sided RDL have allowed a series of new vertically integrated package technology pillars that create the backbone of VIPack™ platform,” commented Mark Gerber, Sr. Director of Technical Marketing and Promotion at ASE. The VIPack™ platform delivers the dense horizontal and vertical interconnect solutions required to interconnect disaggregated SoCs (System-on-Chip) and HBM (High Bandwidth Memory) used for leading-edge HPC, AI, ML, and Network applications. High-speed networking is also being challenged with several complex components for optical packaging that require VIPack™ innovation to bring these components together in a vertical structure for both space and performance enablement. Applications supported by VIPack™ further extend to the mobile market with ultra-low profile SIP modules to address the common RF iterative design process and enable a higher level of performance with integrated passives in the RDL layers. Additionally, the next generation of application processors address the demand for lower profile package solutions, while solving power delivery issues for advanced silicon nodes. Annuncio • Apr 01
ASE Technology Holding Co., Ltd. Announces Cash Dividend for the Year 2021 ASE Technology Holding Co., Ltd. announced appropriations of earnings in cash dividends to shareholders is TWD 7 per share for the year 2021. Annuncio • Feb 11
ASE Technology Holding Co., Ltd. to Report Q4, 2021 Results on Feb 10, 2022 ASE Technology Holding Co., Ltd. announced that they will report Q4, 2021 results on Feb 10, 2022 Annuncio • Apr 30
ASE Technology Holding Co., Ltd. Approves Cash Dividend The board of ASE Technology Holding Co., Ltd. at its meeting held on April 29, 2021 approved a cash dividend of TWD 3.066265 per share will be distributed to the shareholder. Annuncio • Apr 29
ASE Technology Holding Co., Ltd. Announces Cash Dividend Distribution on Behalf of Subsidiary ASE, Payable on April 29, 2021 ASE Technology Holding Co., Ltd. announced on behalf of its Subsidiary ASE, approved cash dividend distribution of TWD 13,100,000,000. The company expects pay on April 29, 2021. Annuncio • Dec 18
ASE, Chunghwa Telecom and Qualcomm Celebrate Taiwan’s 5G Technology Development Milestone with the Introduction of the Smart Factory Powered by A Private 5G mmWave Network for Enterprises ASE Inc, Chunghwa Telecom and Qualcomm Technologies unveiled the world’s first smart factory powered by a private 5G mmWave network located at ASE Kaohsiung, Taiwan. Tien Wu, CEO of ASE Inc; Sheih Chi-Mau, Chairman of Chunghwa Telecom and ST Liew, Vice President of Qualcomm Technologies Asia-Pacific and President of Qualcomm Taiwan and South East Asia convened together to host a press event at ASE’s Building K23. In an industry first, the ASE 5G smart factory is powered by a made-in-Taiwan private 5G mmWave network service provided by Chunghwa Telecom, and supported by Qualcomm’s suite of mmWave solution platform. Three use cases at ASE’s Kaohsiung facility were identified for the deployment - AI + AGV (Artificial Intelligence + Automated Guided Vehicles) smart transportation, Remote Augmented Reality assistance and the AR experience @ASE Green Technology Education Center. These use cases demonstrate the extensive scope and sophistication of 5G technology application that will accelerate the transformation of smart manufacturing and automation. More importantly, the development serves to boost Taiwan’s leadership in 5G technology deployment for smart manufacturing. Use cases at ASE’s 5G smart factory: Artificial Intelligence + Automated Guided Vehicles (AI + AGV) smart transportation. On top of the transportation of goods, the implementation of an automatic line inspection via cameras embedded in smart unmanned vehicles and the use of AI and big data reduced manpower burden as well as ensured workplace safety through regular surveillance and problem detection. Remote Augmented Reality (AR) Assistance. The remote AR system provides ASE’s equipment engineers the convenience of monitoring and reporting data from a centralized control room using big data. With AR assistance, the engineers can synchronize with other colleagues from different locations to service the equipment and hardware, and troubleshoot any problems. The low latency and high speed 5G network not only enhances remote diagnosis but also allows the analysis of big data-generated high-resolution images that can improve detection accuracy, yield and productivity. AR experience @ASE Green Technology Education Center. The center is located at the ASE recycling facility in Kaohsiung, which is also Taiwan’s larger reclaimed water facility. The recycling facility processes water discharged by ASE factories and the treated water is redistributed back to the manufacturing lines for reuse. ASE’s water recycling program demonstrates the company’s successful adaptation of the ‘reduce, recycle and reuse’ principles in water resource management. To better communicate ASE’s water conservation efforts and innovations, the center has tapped on AR technology to provide visitors a rich and immersive learning experience. The seamless AR experience leverages on the low latency, high reliability and high bandwidth features of the private 5G mmWave network. 
