Announcement • Jun 13
Advantest Corporation to Report Q1, 2027 Results on Jul 29, 2026 Advantest Corporation announced that they will report Q1, 2027 results at 9:00 AM, Tokyo Standard Time on Jul 29, 2026 Announcement • Apr 28
Advantest Corporation, Annual General Meeting, Jul 31, 2026 Advantest Corporation, Annual General Meeting, Jul 31, 2026. Announcement • Apr 24
Advantest Corporation Introduces Pin Scale 5000B Digital Test Solution To Extend Capabilities Of V93000 EXA Scale Test Platform Advantest Corporation announced Pin Scale 5000B, an enhanced digital test solution for the V93000 EXA Scale Platform designed to address the growing test requirements of advanced artificial intelligence (AI) and high-performance computing (HPC) devices. AI and HPC semiconductor capabilities and complexity are growing swiftly, driven by advanced process nodes, heterogeneous integration and chiplet-based architectures. These devices require significantly higher structural and functional test coverage and processing of rapidly increasing volumes of test data. The Pin Scale 5000B card significantly expands available vector memory, offering deep and scalable storage capacity aligned with industry demands. Hardware and software facilitate optimal memory usage in chiplet-based architectures, reducing customers’ overall consumption and associated costs while addressing evolving memory requirements for the future. The new card also enables customers to efficiently scale their existing test programs and hardware configurations in response to evolving device requirements. This solution is engineered to accommodate contemporary scan fabric architectures, enabling concurrent testing of multiple IP cores using a streaming approach. Its new hardware capabilities allow test results to be observed across multiple cores within a single test pattern execution, enabling instantaneous insights into error distribution among the cores. These capabilities help improve structural coverage and core-level visibility, significantly reducing test times and cost-of-test. The Pin Scale 5000B delivers high-bandwidth test access, offering data rates up to 5 Gbps through the proven pin electronics architecture of the Pin Scale 5000. Pin Scale 5000B is a fully compatible superset of the established Pin Scale 5000, complementing the V93000 portfolio. The Pin Scale 5000B digital test instrument is now ramping with key customers. Announcement • Mar 14
Advantest Corporation to Report Fiscal Year 2026 Results on Apr 27, 2026 Advantest Corporation announced that they will report fiscal year 2026 results at 3:30 PM, Tokyo Standard Time on Apr 27, 2026 Announcement • Jan 28
Advantest Corporation Revises Consolidated Earnings Guidance for the Year Ending March 31, 2026 Advantest Corporation revised consolidated earnings guidance for the year ending March 31, 2026. For the year, the company expects the net sales to be JPY 1,070,000 million, operating income to be JPY 454,000 million, net income of JPY 328,500 million, net income attributable to owners of the parent to be JPY 328,500 million or basic earnings per share to be JPY 452.34 against net sales to be JPY 950.0 billion, operating income to be JPY 374.0 billion, net income of JPY 275.0 billion. Announcement • Dec 12
Advantest Corporation to Report Q3, 2026 Results on Jan 28, 2026 Advantest Corporation announced that they will report Q3, 2026 results on Jan 28, 2026 Announcement • Oct 30
Advantest Corporation Unveils MTe - Unified, Scalable Test Platform for Power Semiconductor Devices Advantest Corporation announced the MTe power test platform. The cutting-edge MTe redefines test efficiency and scalability to address test requirements for the fast-growing power semiconductor market. Increasing market demand for electrification across automotive, industrial, renewable energy, telecommunication and data infrastructure applications is pushing semiconductor manufacturers to achieve higher performance and lower cost of test (CoT). The MTe platform responds to these needs by combining modular hardware architecture, ultimate system scalability and advanced digital control, redefining the standard in power semiconductor test performance and efficiency. Designed with Advantest technology, MTe provides significant footprint reduction and optimized resource distribution without performance degradation--a key enabler to attract major IDM and OSAT players. The MTe platform is able to address emerging wide-bandgap semiconductor (e.g., SiC and GaN) challenges, as well as the integration of digital IP cores on power devices (e.g., IPM and IPD), providing high bandwidth capture, best-in-class gate driver control, dynamic (and short-circuit) test up to 10kA, and flexible high-voltage digital capabilities. Aligned with Advantest's history of providing scalable test platforms, MTe distributed computing architecture provides significant multisite test efficiency, enabling a high-parallel-test solution with optimized throughput. The MTe platform is now available worldwide. Early evaluations by customers in automotive and industrial power applications have confirmed significant productivity and throughput gains compared with legacy testers. Announcement • Sep 30
Advantest Corporation Launches Power Optimization Solution to Enhance Energy Efficiency and Sustainability in Semiconductor Testing Advantest Corporation launched its new Advantest Power Optimization Solution (APOS) for the V93000 system-on-chip (SoC) test platform. Designed to improve energy efficiency without compromising performance, the APOS software enables foundries and outsourced semiconductor assembly and test (OSAT) providers to achieve their sustainability goals while reducing operational costs. With energy consumption representing a significant operational expense, semiconductor companies are actively seeking ways to optimize power usage. Developed by Advantest's production service team, APOS provides a comprehensive power-saving framework, allowing users to visualize and manage V93000 tester power consumption in real time, helping to lower electricity costs while maintaining high throughput and test accuracy. In addition, APOS contributes to corporate sustainability efforts by improving tester energy efficiency and thereby reducing the overall carbon footprint. The APOS software has already been installed on V93000 test systems at multiple customer sites, yielding positive results in reducing test costs and strengthening environmental initiatives. Smart power management - APOS expands Advantest's Smart TestCell (STC) ecosystem, which leverages advanced automation and resource management to enable smart semiconductor manufacturing. APOS automatically enables/disables selected test cards based on real-world tester scenarios, reducing unnecessary power consumption. Real-time visualization - APOS Client Display provides an intuitive dashboard with real-time insights into power usage and card type, status and quantity used. Centralized control and reporting - The APOS Dashboard integrates with the Testcell Central System (TCS) Server Web Dashboard to centrally manage test-floor power-saving data and utilizes the history record for reporting and further optimization. The Advantest Power Optimization solution for the V93000 test platform is available now to the global market. Announcement • Sep 18
Advantest Corporation Expands 7038 System-Level Test Platform with Right-Sized Single Test Rack Solution for High-Volume Manufacturing Advantest Corporation announced its 7038 Single Test Rack (STR) system-level test (SLT) and burn-in test (BI) solution. The 7038 STR extends the company's proven 7038 SLT platform with a lower-cost architecture optimized for slot-based automated test solutions, enabling right-sized SLT deployment in the production of artificial intelligence (AI), high-performance compute (HPC), automotive, and other low- to mid-volume devices. The new 7038 STR delivers liquid-cooled thermal management of up to 1.4 kW per test site, enabling robust testing of today's most complex and power-hungry devices. Like the 7038 dual-rack test solution, the 7038 STR will also offer air-cooled thermal management for even more cost-effective test. With asynchronous test capability for up to 48 sites, the system offers a single-vendor turnkey solution that includes socket interface boards (SIBs), sockets, device multi-zone thermal management, software management and control, and an integrated automated handler. This single-source approach eliminates the need to obtain multiple components from different suppliers, streamlining deployment and reducing risk for customers. As device complexity and power requirements continue to rise in the HPC, AI, and automotive markets, the need for advanced SLT and BI solutions has grown significantly. In particular, automotive makers investing heavily in advanced driver assistance systems (ADAS) and telematics processing need a mid-power solution that goes beyond air-cooled thermal solutions for SLT. The 7038 STR provides a solution that can scale with the power and size increase of these processors. Air-cooled systems are limited to approximately 100 W per device, while the 7038 STR's liquid-cooled design supports the higher power levels demanded by next-generation processors with future upgrade capabilities exceeding 1.4 kW. "The 7038 STR represents the next evolution of system-level and burn-in test portfolio. The 7038 STR is especially suited for mid- to low-volume production environments where customers require advanced SLT/BI capabilities without the higher investment and larger footprint of dual-rack systems. Its compatibility with the broader 7038 product family means that customers can easily migrate test programs and hardware between the single- and dual-rack configurations as their production volumes grow. In addition, the system is fully compatible with ATS ActivATE360™?, Advantest's intuitive test management software. ActivATE provides turnkey real-time monitoring, logging, and control across device temperature, current, and power, simplifying program development and ensuring smooth integration into customer test environments. The 7038 Single Test Rack solution is available immediately, with pricing dependent on slot configuration, sites per slot, and thermal requirements. Announcement • Sep 12
Advantest Corporation to Report Q2, 2026 Results on Oct 28, 2025 Advantest Corporation announced that they will report Q2, 2026 results on Oct 28, 2025 Announcement • Sep 09
Advantest Introduces Advanced Mask CD-SEM* E3660 Advantest Corporation announced the release of its next-generation CD-SEM* E3660, engineered for the dimensional metrology of photomasks and EUV masks used in cutting-edge semiconductor manufacturing. Compared to the previous generation's E3650, the E3660 delivers more than a 20% improvement in CD reproducibility, enabling process engineers to meet the stringent requirements of mask manufacturing at the 2nm node and beyond. By reinforcing lithography process control in advanced device fabrication, the E3660 furthers Advantest's vision of providing holistic test solutions across the semiconductor value chain. In semiconductor device fabrication, continuous scaling and pattern complexity are driving a sharp increase in lithographic hotspots--locations where multi-patterning and pattern transfer become particularly error-prone. Masks used to form wafer circuitry are evolving, with higher layer counts and more intricate geometries. This, in turn, has significantly increased the number of required metrology sites, demanding measurement systems with both higher throughput and superior reproducibility. The industry is also transitioning toward curvilinear mask patterns, enabled by advances in multi-beam mask writing and high-performance computing. These patterns are expected to see large-scale deployment around 2027 with the adoption of High Numerical Aperture EUV lithography in device production. To ensure design-to-mask fidelity under these conditions, CD-SEMs must not only provide highly reproducible critical dimension measurements but also generate SEM images with greater fidelity to true pattern contours. Moreover, metrology solutions must evolve to incorporate curvature-sensitive algorithms capable of quantifying deviations between complex mask features and original design intent. Leading up to the development of the E3660, Advantest has collaborated with imec, to validate the correlation of CD-SEM results obtained from the "E3650" with those from Advantest's previous generation CD-SEMs and EDA-based reference data. This enabled Advantest to improve metrology reliability and work with imec to advance the development and validation of new measurement techniques for curvilinear geometries. The E3660 platform reflects the outcome of this collaboration, achieving the reproducibility required for 2nm node mask manufacturing, enabling high-throughput measurement to handle increasing site counts, and providing unique measurement functions for curvilinear patterns. By integrating these capabilities, the E3660 is positioned to deliver robust metrology support for the next generation of mask R&D and production environments. Advantest will initially target the E3660 for deployment at Merchant Mask Shops, where commercial mask manufacturers produce masks for external customers, and Captive Mask Shops, which are in-house mask production facilities of semiconductor manufacturers. This activity establishes the E3660 as a core evaluation tool for advanced mask development and production qualification. Critical Dimension Scanning Electron Microscope: an electron microscope specialized for high-precision measurement of fine pattern dimensions on semiconductor wafers and masks. Announcement • Sep 04
Advantest Corporation to Present Latest Test Solutions At SEMICON Taiwan 2025 Advantest Corporation will present its latest test solutions at SEMICON Taiwan 2025 on Sept. 10-12 at the TaiNEX 1 & 2 in Taipei. At this year's SEMICON Taiwan, Advantest will present innovative, sustainable test technology guided by its new corporate vision, "Be the most trusted and valued test solution company in the semiconductor value chain." Moreover, Advantest's Taiwanese subsidiary will commemorate its 30th anniversary, celebrating decades of service to Taiwan's rapidly growing semiconductor market. Announcement • Aug 04
Advantest Corporation to Showcase Latest Memory Test Solutions At Future of Memory and Storage 2025 Advantest Corporation will showcase its latest memory test systems and solutions at the Future of Memory and Storage 2025 (formerly known as Flash Memory Summit) on Aug. 5-7 at the Santa Clara Convention Center in Santa Clara, California. Advantest is a gold sponsor of the event. Product Highlights: Advantest's booth #634 will be in Hall B of the convention center. The company will feature its end-to-end memory test solutions for testing next-generation memory chips, such as high-bandwidth memory (HBM), DRAM, NAND flash, non-volatile memory (NVM) and protocol storage devices. Advantest will also highlight its new T5801 ultra-high-speed DRAM test system that supports the latest advancements in high-speed memory technologies, including GDDR7, LPDDR6, and DDR6. Announcement • May 12
Advantest Corporation to Showcase Latest Test Solutions At Semicon Southeast Asia 2025 Advantest Corporation will feature its latest test solutions at SEMICON Southeast Asia 2025 on May 20-22 at the Sands Expo and Convention Centre in Singapore. Located in Hall A on Level 1 at Booth #L1511, Advantest will showcase a wide range of solutions that address the technology challenges in the era of complexity. Through this broad product portfolio, Advantest can cater to diverse customer needs, optimizing efficiency to enable critical applications like high-performance computing (HPC), AI, automotive, and 5G/IoT, while supporting crucial technologies such as silicon photonics, high-bandwidth memory (HBM) and 2.5D/3D packaging. Advantest's product highlights will include: NEW SiConic, a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. Solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RF IC test card, the PMUX02 advanced power multiplexer, the DC Scale XHC32 ultra-high-current power supply card, and the high-speed Pin Scale Multilevel Serial HSIO instrument. Extending the V93000 test system's capabilities to support high-volume production of silicon photonics and co-packaged optics devices via a partnership with FormFactor. The HA1200 die-level handler that can be linked with a tester to utilize Advantest's unique active thermal control technology to test singulated and/or partially assembled dies. ACS Real-Time Data Infrastructure (ACS RTDI™?), a solution platform that automates the process of converting insights into actionable production steps within the same test insertion in milliseconds, optimizing yield, improving quality and reducing time to market. ACS Gemini™? software development platform, which acts as the digital twin to ACS RTDI™? to allow customers to develop, simulate and debug machine learning applications in a virtual environment. NEW Advantest Power Optimization Solution (APOS), a software solution designed to optimize the power management during the V93000 tester's power-on period. It enables foundries and outsourced semiconductor assembly and test (OSAT) providers to achieve their sustainability goals while reducing operational costs. Announcement • May 08
Advantest Corporation Unveils SiConic Test Engineering: Unified, Scalable Bench Environment for Debug and Validation Advantest Corporation unveiled SiConic Test Engineering (TE), the newest addition to the SiConic family introduced in February 2025. SiConic TE offers test engineers the ability to bring up and validate structural and functional tests over high-speed I/O (HSIO) interfaces in a scalable bench environment, enabling earlier validation and debug without occupying valuable ATE systems. SiConic Link flexibly connects to standard evaluation boards through functional interfaces like USB, PCIe, control interfaces, and GPIOs. This is the foundation for SiConic TE to enable test engineers to rapidly validate and debug design verification (DV) and design for test (DFT) content in SiConic's unified environment on the bench. Building on the V93000 test system's leadership in scan over USB or PCIe, SiConic's unified environment brings native DV test content to test engineering without the error-prone and lengthy conversion and debug cycles typical for bring-up of advanced functional tests on ATE. Integrating seamlessly with SiConic Link hardware and the SmarTest 8 software platform, SiConic TE provides users with comprehensive access to functional HSIO links for enhanced throughput and rich trace capabilities during test execution. By enabling smoother handoffs between silicon validation (SV), DV and TE teams, SiConic TE fosters tighter cross-domain collaboration. Through its unified test environment and shared ecosystem, SiConic TE improves the correlation between bench, ATE and SLT systems. The tool's optimized engineering resources allow bring-up and debug to be offloaded from ATE to the bench, freeing up valuable tester capacity and enabling more effective scaling. In addition, tight integration with leading EDA partners enables cross-functional collaboration with leading EDA partners enables Cross-functional collaboration with DV and DFT teams, improving test content development and speeding first-silicon success. Advantest developed SiConic TE in close collaboration with leading customers and EDA partners to ensure seamless integration into existing design and validation flows. Announcement • Mar 18
Advantest Corporation to Showcase Latest IC Test Solutions at SEMICON China 2025, March 26-28 in Shanghai Advantest Corporation will showcase its latest test solutions at SEMICON China 2025 on March 26-28 at the Shanghai New International Expo Centre in Shanghai. Advantest will highlight its broad portfolio of test technology for applications, including advanced memory, automotive, RF wireless communications and CMOS image sensors. Advantest will be located at booth #4431 in Hall N4. This year's digital display will feature key test solutions that enable innovation and technology essential to daily lives, including: NEW T5801 Ultra-High-Speed DRAM test system, engineered to support the latest advancements in high-speed memory technologies, including GDDR7, LPDDR6 and DDR6. NEW solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RF IC test card, the PMUX02 advanced power multiplexer, the DC Scale XHC32 ultra-high-current power supply card, and the high-speed Pin Scale Multilevel Serial HSIO instrument. T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive, power analog and CMOS image sensors. T6391 test system for high-speed, high-accuracy and high-voltage measurement demands to test emerging display driver ICs. ACS TE-Cloud™?, a one-stop test engineering solution platform, offering a complete test development environment with an integrated set of software tools for V93000 test program development. ACS Real-Time Data Infrastructure (ACS RTDI™?), a solution platform that automates the process of converting insights into actionable production steps within the same test insertion in milliseconds, optimizing yield, improving quality and reducing time to market. Announcement • Mar 14
Advantest Corporation to Report Fiscal Year 2025 Results on Apr 25, 2025 Advantest Corporation announced that they will report fiscal year 2025 results on Apr 25, 2025 Announcement • Feb 27
Advantest Corporation to Showcase IC Test Solutions at IESA Vision Summit 2025 Advantest Corporation will showcase its latest test solutions at IESA Vision Summit 2025 on March 5-7 at the Mahatma Mandir, Convention and Exhibition Centre in Gandhinagar, Gujarat, India. Advantest will highlight its broad portfolio of leading-edge test technology for applications, including advanced memory, automotive, artificial intelligence (AI) and high-performance computing (HPC). The IESA Vision Summit is the premier platform dedicated to advancing India's semiconductor and electronics ecosystem, bringing together industry leaders, government policymakers, innovators and experts to discuss cutting-edge technologies, emerging trends and transformative collaborations. As a global leader in providing semiconductor test solutions, Advantest is eager to show its support for India's emerging semiconductor industry. The company is a gold sponsor for this year's event. Product Displays: Advantest will be located at booth #212 in Hall 1. This year's digital display will feature key test solutions that enable innovation and technology essential to daily lives, including: NEW SiConic, a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. NEW solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RFIC test card, the DC Scale XHC32 ultra-high-current power supply card and the high-speed Pin Scale Multilevel Serial HSIO instrument. NEW T5801 Ultra-High-Speed DRAM test system, engineered to support the latest advancements in high-speed memory technologies - including GDDR7, LPDDR6 and DDR6 - critical to meeting the growing demands of artificial intelligence (AI), high-performance computing (H PC) and edge applications. Instruments for the V93000EXA Scale test system that enable the testing of power and analog devices, such as battery management systems (BMS), automotive and power ICs, including the new PMUX02 advanced power multiplexer and the Pin Scale 5000 digital card. Announcement • Feb 20
Advantest Introduces Siconic: Groundbreaking Solution for Automated Silicon Validation Advantest Corporation unveiled SiConic: a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. Debuting next week at DVCon in San Jose, Calif., SiConic signals Advantest’s commitment to transforming the R&D process for its customers. The semiconductor industry is facing unprecedented challenges. Growing SoC design complexity, together with the adoption of 3D packaging and heterogeneous integration, is straining traditional validation workflows. DV and SV teams are under pressure to reduce time-to-market and time-to-quality – even as more devices with more intricate features are being developed within constrictive timelines. Reusing the wealth of verification content developed in pre-silicon would provide an efficiency and quality breakthrough. However, the industry lacks the automated flow and tools to reliably re-use and extend verification tests for silicon validation. SiConic’s ecosystem – including EDA partners such as Cadence, Siemens and Synopsys – overcomes this barrier to reuse, enabling engineering efficiency and accelerated test execution on real silicon. SiConic Explorer, the platform’s software backbone, offers an automated flow by integrating seamlessly with EDA verification tools based on the Accellera Portable Test and Stimulus Standard (PSS), e.g., the Cadence Perspec System Verifier. In addition, integration with debuggers, such as Lauterbach’s TRACE32 debugging tool, accelerates the bring-up of complex multi-IP test cases. SiConic Link is the hardware foundation of the SiConic solution on a bench. With its high-speed I/O (HSIO) capability, SiConic Link supports protocols such as PCIe and USB to enable functional validation with high throughput and rich tracing capabilities during test execution. The test instrument provides control interfaces (e.g., JTAG, SPI) and general-purpose I/Os, improves the debugging workflow and provides extensive control and observability of the device in its target board environment. With SiConic, DV engineers can now leverage familiar pre-silicon techniques, expanding their functional coverage in post-silicon. Similarly, SV engineers benefit from seamless load, set parameters and debug of PSS-based or manually directed content on silicon, thereby enabling rapid and reliable device bring-up and functional characterization. The highly portable solution can be easily scaled for use by distributed global R&D teams collaborating on a complex SoC with diverse IP blocks. SiConic enables confident sign-off decisions through team collaboration and data-driven insights – building trust with customers receiving early samples and expecting reliable ramp and operation during the lifetime of their systems. Leading Advantest IC customers and EDA partners are already working with SiConic and seeing the benefits of its performance and productivity advantages. Announcement • Feb 13
Advantest Corporation to Showcase Latest Test Solutions at SEMICON Korea 2025, Feb. 19-21, in Seoul Advantest Corporation will showcase its latest test solutions at SEMICON Korea 2025 on Feb. 19-21 at COEX in Seoul, South Korea. Advantest will highlight its broad portfolio of test technology for applications, including advanced memory, 5G, artificial intelligence (AI) and high-performance computing (HPC). In addition, as one of the founding members of SEMI's Semiconductor Climate Consortium (SCC), the company plans to promote its ESG initiatives at this year's show. Announcement • Feb 12
Advantest Corporation Unveils T5801 Ultra-High-Speed Memory Test System to Power Next-Generation DRAM Devices Advantest Corporation announced the T5801 Ultra-High-Speed DRAM Test System. The cutting-edge platform is engineered to support the latest advancements in high-speed memory technologies – including GDDR7, LPDDR6, and DDR6 – critical to meeting the growing demands of artificial intelligence (AI), high-performance computing (HPC) and edge applications. Increasingly complex, high-speed memory technologies are pushing the boundaries of data center and AI performance. The T5801 is tailored to address this challenge by enabling accurate and efficient mass production testing for the highest-speed memory devices. Featuring an innovative Front-End Unit (FEU) architecture, the system is uniquely equipped to handle the rigorous requirements of next-generation DRAM modules, delivering industry-leading performance of up to 36Gbps PAM3 and 18Gbps NRZ. The T5801 builds on Advantest’s market leadership in DRAM test solutions, including the proven T5503 series and V93000HSM systems. Its support for PAM3, a first in JEDEC-standard DRAMs, highlights the system’s capacity to handle memory innovations such as GDDR7, which is central to achieving ultra-low latency in all AI environments. Its scalable testing infrastructure enables a seamless transition from engineering R&D to production, offering flexible configurations and full compatibility with existing handlers and interfaces. Already in use by strategic memory customers, the T5801 DRAM test system will be released to the global market early next year. To learn more about the ultra-high-speed T5801, as well as Advantest’s full line of automated test equipment and materials, visit booth P201 at SEMICON Korea 2025, February 19-21, at COEX in Seoul, South Korea. Note to Editors: GDDR7 = Graphics Double Data Rate 7; LPDDR6 = Low Power Double Data Rate 6; DDR6 = Double Data Rate 6; PAM3 = Pulse Amplitude Modulation 3. Announcement • Dec 13
Advantest Corporation to Report Q3, 2025 Results on Jan 29, 2025 Advantest Corporation announced that they will report Q3, 2025 results on Jan 29, 2025 Announcement • Dec 09
Advantest Corporation Launches KGD Test Cell for Power Semiconductors Advantest Corporation announced an integrated test cell designed to maximize die-level test yields for wide-bandgap (WBG) devices essential to power semiconductors. The Advantest Known Good Die (KGD) Test Cell combines the company’s CREA MT series power device testers with the new HA1100 die prober. Demand for power semiconductors continues to grow with the rapid escalation of electric vehicles (EV) and power infrastructure. WBG devices, particularly silicon carbide (SiC) and gallium nitride (GaN), are essential for the design and manufacture of power semiconductors, enabling them to be smaller, faster and more efficient than silicon-based devices. However, screening for failures in WBG devices is challenging, as the probe card, chuck and devices can be damaged due to the high voltage and current at which they operate. Essentially serving as a one-stop shop for efficient equipment management, the Advantest KGD test cell solution helps reduce customers’ manufacturing costs. CREA’s proprietary probe card interface (PCI) technology can eliminate damage risk. However, if damage does occur, Advantest can investigate it using the test cell, allowing customers to minimize downtime. The HA1100 die prober for the CREA MT series test systems enables the assembly of dies in power modules using only passed (KGD) die, ensuring no failed die find their way into the module. This prevents yield loss at module test, thus reducing the loss of final multi-die assembled power modules. Currently under development, the HA1100 die prober will be released to the global market in the second quarter of 2025. Announcement • Dec 05
Advantest Launches ACS Gemini – New Developer Platform for Accelerating ACS RTDI Application Development Advantest Corporation announced the launch of its new software development platform ACS Gemini, which allows customers to develop, simulate and debug machine learning applications in a virtual environment. The digital twin of ACS RTDI, ACS Gemini is part of Advantest’s mission to enable customers and partners to utilize data analytics in developing artificial intelligence (AI) and machine learning (ML) solutions for semiconductor testing. In recent years, manufacturing costs for semiconductors have increased significantly due to their growing complexity. Analysts at McKinsey & Company predict that implementing AI and ML could lower manufacturing costs by 40%, as many engineers use these technologies to optimize efficiency in manufacturing. ACS Gemini improves efficiency by providing customers with a seamlessly integrated experience that optimizes design-to-production proficiency in the virtual ACS RTDI environment. The digital twin software solution is composed of the ACS Software Development Kit, Reference Application Development Model, and Containerized applications publishable to the ACS Container Hub™. These elements enable customers to simulate valuable test results in a virtual production setting. ACS Gemini saves customers time and cost in engineering debugging, design vs. production correlation, and cloud deployment of apps – ultimately saving valuable tester time. Overall, the solution accelerates ML application development, simulates testing results, and shortens the time-to-deployment of ML applications on the production test floor. Advantest’s ACS RTDI is a real-time data infrastructure platform-as-a-service that securely collects, analyzes, stores and monitors semiconductor test data to empower customers to automate the process of converting insights into actionable test decisions within milliseconds. This helps customers and partners reduce test time, optimize quality and reliability and enhance smart packaging. The solution will be available to the global market in early 2025. Announcement • Sep 13
Advantest Corporation to Report Q2, 2025 Results on Oct 30, 2024 Advantest Corporation announced that they will report Q2, 2025 results on Oct 30, 2024 Announcement • Jul 03
Advantest Corporation to Showcase Latest Test Technology at SEMICON West 2024 Advantest Corporation will showcase its latest IC test solutions at SEMICON West 2024 on July 9-11 at the Moscone Center in San Francisco. Advantest will highlight its broad portfolio of test technology for applications, including AI and high-performance computing (HPC), 5G, automotive and advanced memory. In addition, as one of the founding members of SEMI's Semiconductor Climate Consortium (SCC), the company plans to promote its ESG initiatives at 2024's SEMICON West. Product Displays: Advantest will be located at booth #1039 in the South Hall. This year’s display will feature key test solutions that enable innovation and technology essential to its daily lives. Products include: NEW: The DC Scale XHC32 power supply, offering 32 channels with an unprecedented total current of up to 640A and unique safety capabilities for unmatched equipment protection to optimize test of AI, HPC, and other high-current devices; Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces; HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages; CREA’s power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications; T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs; ACS Real-Time Data Infrastructure (ACS RTDI™), an open solutions ecosystem enabling streaming data access and real-time analytics with integrated test software and hardware monitoring and control to improve semiconductor device yield, quality, and capacity; Next-generation Flash/NVM test solutions, such as T5851-STM32G, capable of testing and covering the latest generation of embedded protocol NAND devices with UFS/PCIe interface up to 32 Gbps and T5230 with a combined array architecture to reduce test cost for NAND/NVM wafer test, including DRAM wafer-level burn-in (WLBI). Announcement • Jun 15
Advantest Corporation to Report Q1, 2025 Results on Jul 31, 2024 Advantest Corporation announced that they will report Q1, 2025 results on Jul 31, 2024 Announcement • May 22
Advantest Corporation to Exhibit Latest Test Solutions At SEMICON Southeast Asia, May 28-30, 2024 Advantest Corporation will feature its latest test solutions at SEMICON Southeast Asia 2024 on May 28-30, 2024 at the Malaysia International Trade and Exhibition Centre (MITEC) in Kuala Lumpur, Malaysia. Advantest is a gold sponsor of this year's event. In Hall 3 booth #1008, Advantest will exhibit a broad range of test solutions that enable critical applications like high-performance computing (HPC), AI, automotive, and 5G/IoT. Advantest's digital display will include: Test Platforms and Handlers: NEW: The DC Scale XHC32 power supply offers 32 channels with an unprecedented total current of up to 640A and unique safety capabilities for unmatched equipment protection to optimize test of AI, HPC, and other high-current devices. Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces. HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages. CREA's power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications. Next-generation Flash/NVM test solutions, such as T5851-STM32G capable of testing and covering the latest generation of embedded protocol NAND devices with UFS/PCIe interface up to 32 Gbps and T5230 with a combined array architecture to reduce test cost for NAND/NVM wafer test, including DRAM wafer-level burn-in (WLBI). Global Services Field service solutions focused on increasing customers' automation efficiency by creating a test cell solution complete with handlers and testers for high-volume manufacturing. Announcement • Mar 15
Advantest Corporation to Report Fiscal Year 2024 Results on Apr 26, 2024 Advantest Corporation announced that they will report fiscal year 2024 results on Apr 26, 2024 Announcement • Mar 12
Advantest to Exhibit Latest Test Solutions at SEMICON China, March 20-22 in Shanghai Advantest Corporation will feature its latest test solutions at SEMICON China 2024 on March 20-22 at the Shanghai New International Exhibit Center (SNIEC). In a unique application-based exhibit, Advantest will highlight how its test technology enables innovations in high-performance computing (HPC), AI, automotive, IoT and 5G. Advantest aims to develop test technology that supports a safe, secure and sustainable society, showcasing its sustainability initiatives at this year's event. AI/HPC: NEW: Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces. NEW: HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages. NEW: 2kW active thermal solution for M487x package handler series, offering thermal control capabilities to enable 100% test coverage for high computing ICs at final test. Automotive: CREA’s power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications. T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs. T6391 test system with LCD HP multi-channel digitizer module that addresses high-accuracy and high-voltage measurement demands for testing emerging display driver ICs. IoT/5G: V93000 Wave Scale millimeter OTA enables far-field/near-field parametric OTA testing for millimeter wave applications (5GNR2, WiGiG, Car Radar). The solution covers multi-site testing for mass production and could be easily integrated into existing test infrastructure. Wave Scale RF, designed for cost-efficient production of 5G and Wi-Fi communication ICs, including WiFi 7 and WiFi 6E devices. Data Storage and Management: NEW: T5230 memory test system adopts a combined array architecture to reduce test cost for NAND/NVM wafer test, including wafer-level burn-in (WLBI). Wide-ranging DRAM turn-key test solutions, including wafer-level burn-in, DRAM wafer test, core final test, and at-speed interface test. T5830 SSTH memory wafer test system, offering a small economic footprint and full CP test coverage for eFlash/Smart Card and NOR/NAND flash. Announcement • Feb 29
Advantest Corporation Announces Management Changes, Effective April 1, 2024 Advantest Corporation announced that the Board of Directors at its meeting held on February 28, 2024, resolved to change the company’s representative directors as follows. Reason for the changes: As the company’s next mid-term management plan starts in fiscal year 2024, the Chief Executive Officer of the Advantest Group and the President of Advantest Corporation are to be changed in order to realize even greater progress for the Advantest Group in the rapidly changing, fast-growing semiconductor industry. The company appointed Douglas Lefever as Representative Director, Senior Executive Officer, Group CEO from Representative Director, Corporate Vice President, Group COO; Yoshiaki Yoshida as Director, Chairperson of the Board from Representative Director, President, Group CEO. Effective date: April 1, 2024. Douglas Lefever (December 10, 1970): May 1993- Completed BSE of Mechanical Engineering, The University of Michigan; May 1995- Completed Master of Science in Mechanical Engineering, The University of Texas at Austin; June 1998- Joined Advantest America Inc.; June 2004- Completed Master of Business Administration (MBA) Northwestern University; September 2008- Vice President, Business Development, Advantest America Inc.; August 2014-Executive Officer, Advantest Corporation; September 2014- Director, President and CEO, Advantest America Inc.; June 2017- Managing Executive Officer, Advantest Corporation; June 2019- Executive Vice President, System Test Business Unit (present position); June 2020- Director, Managing Executive Officer Customer Relations & Corporate Strategy Leader, Applied Research & Venture Team; June 2021- Director, Senior Executive Officer CSO (Chief Strategy Officer); January 2023- Representative Director, Corporate Vice President, Group COO (present position). Announcement • Feb 02
Advantest Corporation Revises Earnings Forecast for the Year Ending March 31, 2024 Advantest Corporation revised earnings forecast for the year ending March 31, 2024. For the period, the company expected net sales of ¥480,000 million, operating income of ¥85,000 million and net income attributable to owners of the parent of ¥64,500 million. Announcement • Dec 16
Advantest Corporation to Report Q3, 2024 Results on Jan 31, 2024 Advantest Corporation announced that they will report Q3, 2024 results on Jan 31, 2024 Announcement • Dec 07
Advantest Corporation Targets NAND Flash/NVM Market with New Group of Memory Test Products Advantest Corporation announced three new additions to its suite of memory test products. The new offerings are designed to target NAND Flash and non-volatile memory (NVM) devices, which face extreme pressure to bring down test costs and cost of ownership on the test floor. The new products include the T5230 memory wafer test solution; the STM32G third-generation protocol NAND system-level test module for the T5851 memory tester; and the T5835 high-speed wafer-sort interface option. The T5230 memory test system for NAND/NVM devices adopts a combined array architecture to achieve best-in-class cost-of-test performance for wafer test, including wafer-level burn-in (WLBI) and built-in self-test (BIST). The system can perform on-wafer test of 1,024 memory devices per test head in parallel, delivering high productivity and enabling floor space savings of up to 86%. Multiple test cells are connected per system controller in the T5230, allowing independent wafer test of each test cell. The test cells can be stored in a general multi-wafer prober while minimizing the test cell floor space, and the tester can be docked with probers in both linear and multi-stack configurations. For functional tests at a maximum test rate of 125MHz/250Mbps, the T5230 assures high timing accuracy, repeatability, and failure detection capability. The T5851-STM32G module is designed to cover the latest generation of protocol NAND devices, including UFS4.0 and PCIe Gen 5 ball grid array (BGA) packaged devices for high-speed system-level NAND testing at up to 32Gbps. Fully upgradeable and compatible with existing T5851 systems, the new module delivers tester-per-DUT (device under test) performance and is qualified for high-volume manufacturing, qualification, reliability and characterization. Created as an option for the proven T5835 multifunction memory test system, the new high-speed wafer- Sort interface enables high-speed NAND Flash/NVM wafer probing (up to 5.4Gbps) with 4,096 full I/O channels. Raw NAND die inside solid-state drives (SSDs) require increasingly higher-speed functionality, necessitating evaluation and test of die performance at the wafer level, not just in package-level final test. The solution delivers high-speed probe interface with wafer-level evaluation of memory core test functionalities during engineering production, contributing to the T5835's overall value by delivering wider test coverage. Announcement • Nov 10
Advantest Corporation to Showcase Latest Test Solutions at SEMICON Europa 2023, Nov. 14-17, in Munich, Germany Advantest Corporation will showcase its latest IC test solutions at SEMICON Europa 2023 on Nov. 14-17 at the Messe Munich in Munich, Germany. Under the theme "Beyond the Technology Horizon," Advantest will highlight its wide portfolio of test technology for applications including automotive, 5G, AI and high-performance computing (HPC). This year's SEMICON Europa will happen in conjunction with productronica, a trade fair focusing on the newest innovations and trends in electronics manufacturing. Advantest will be located at booth #317 in Hall B1. This year's digital display will feature key products, including: V93000 EXA Scale SoC test systems, highlighting automotive test solutions and the new XPS128+HV universal VI and power supply card that lowers the cost of test for power management ICs and other high-voltage devices. CREA's power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer DIE and module, typically used in industrial and automotive applications. ACS open solutions ecosystem enabling streaming data access and real-time analytics with integrated test software and hardware monitoring and control to improve semiconductor device yield, quality, and capacity. Announcement • Oct 25
Advantest Corporation Announces A New Active Thermal Control (ATC) Option for Its M4841 High-Volume Device Handler Advantest Corporation announced a new Active Thermal Control (ATC) option for its M4841 high-volume device handler. ATC 2.0 provides dynamic regulation of temperature fluctuations caused by automotive semiconductors self-heating during test, helping to ensure more accurate production test of up to 16 advanced systems-on-chip (SoCs) in parallel with higher throughput and shorter test times. Massive amounts of data processing are required for devices used to power electric vehicles (EVs) and other fast-growing, data-intensive automotive applications such as infotainment systems and forthcoming Level 4 autonomous driving. Advances in semiconductor manufacturing processes bring improvements in functionality as well as enhanced power efficiency for these advanced devices. As a result, thermal design power is actually increasing, causing devices to self-heat during test and making it more difficult to control test temperature. This creates a need for handlers that can perform prompt, stable device temperature management. Replacing the handler’s prior passive thermal control technology, integrated ATC enables the M4841 to provide a stable, consistent test environment with fast response and high load-tracking characteristics that maintain the device’s internal temperature at the set test temperature, even if dynamic heat fluctuation occurs during the test. This stability enables users to build test programs with unparalleled implementation flexibility – in turn, significantly enhancing overall test productivity. Advantest’s M4841 handler with ATC 2.0 enables high-throughput test of up to 16 devices in parallel, yielding very high device volumes and supporting a range of complex ICs and packages. Its advanced performance capabilities and features make the M4841 the optimal test handler for high-volume production of devices used in consumer products such as portable digital equipment and automotive systems. The new ATC option for the M4841 handler will be available in April 2024. Announcement • Oct 05
Advantest Corporation to Showcase Latest Semiconductor Test Solutions At the International Test Conference in Anaheim, California Advantest Corporation announced that it will feature its latest test solutions for advanced ICs at the 2023 International Test Conference (ITC) on Oct. 8-13 at the Disneyland Convention Center in Anaheim, California. International Test Conference is the world’s premier conference dedicated to the electronic test of devices, boards and systems-covering the complete cycle from design verification, test, diagnosis, failure analysis and back to process and design improvement. Advantest is a proud Platinum sponsor of ITC 2023 and will also sponsor the IEEE Automotive, Reliability, Test & Safety Workshop (ARTS) and Silicon Lifecycle Management Workshop (SLM), which will take place in conjunction with this year’s event. Products and Demos: Advantest's product showcase in booth #217 will highlight the company’s broad portfolio, including ATE, device interface, System Level Test (SLT) and analytics solutions that add customer value to the evolving semiconductor value chain. This year's digital displays will include: V93000 EXA Scale SoC test systems, including the new XPS128+HV universal VI and power supply card that lowers the cost of test for power management ICs and other high-voltage devices; DUT Scale Duo interface for the V93000 EXA Scale SoC test systems that extends DUT board space for high-volume testing and is compatible with existing DUT boards; Link Scale channel cards for the V93000 platform that improve test coverage and boost throughput in high-quality testing of complex SoCs, adding software-based functional test and HSIO SCAN test capabilities; The ACS open solutions ecosystem that is a family of products and services based on a single scalable data platform that enables third-party developers and customers to develop valuable data insights powered by the ACS Real-Time Data Infrastructure. Using real-time machine learning solutions, customers can turn these valuable insights into production-worthy actions across the entire semiconductor value chain resulting in increased yields, more rapid time-to-market, accelerated time-to-volume, and superior quality for suppliers; Advantest’s System Level Test platforms that achieve cost-effective structural test coverage (SCAN, MBIST, LBIST etc.) over functional high-speed IO interface, which can be leveraged to test over 700 DFT-enabled DUTs on ATS 7038. The seamless portability of the structural test patterns developed for ATE platform (Advantest V93000) on to ATS 7038 will be featured as well. Announcement • Sep 28
Advantest Corporation Receives PCI Express(R) Gen 5 Certification for MPT3000 Solid-State Drive Test Systems Advantest Corporation announced that its MPT3000 solid-state drive (SSD) test system has become the world's first SSD production tester to be certified by PCI-SIG(R) for high-speed compliance testing of PCI Express(R) (PCIe(R)) fifth-generation (Gen 5 or 5.0) devices. Advantest completed the rigorous testing process and was awarded certification in August 2023. Previously approved for PCIe 4.0 compliance testing, the MPT3000 is now also approved for official PCIe 5.0 compliance and certification testing. The PCIe 5.0 certification was awarded specifically to two key products in the MPT3000 family: the MPT3000ES3 for engineering and the MPT3000HVM3 for high-volume manufacturing. Announcement • Sep 16
Advantest Corporation to Report Q2, 2024 Results on Oct 31, 2023 Advantest Corporation announced that they will report Q2, 2024 results on Oct 31, 2023 Announcement • Aug 03
Advantest Corporation to Showcase Latest Memory and SSD System-Level Test Solutions At Flash Memory Summit 2023 Advantest Corporation will showcase its latest storage and memory test solutions at Flash Memory Summit 2023 on Aug. 8-10 at the Santa Clara Convention Center in Santa Clara, California. Advantest is again a gold sponsor of this year's event. Advantest's booth #634 will be located in Hall B of the convention center. This year's display will feature the MPT3000HVM3 test system that addresses test requirements associated with PCI Express fifth generation (PCIe Gen 5), Compute Express Link (CXL) and NVMe solid state drives (SSDs). Its latest innovation, the HVM3, provides broad capabilities to handle virtually any SSD, from the highest-performing enterprise drives to the most cost-effective client devices. Advantest will also exhibit its all-in-one, turnkey NAND test solution, the T5835, as well as the T5503HS2, a DRAM tester for LPDDR5/X, DDR5 and GDDR6 devices. Additionally, Advantest will display its inteXcell, the first-ever fully integrated and unified test infrastructure to combine broad test coverage with high-throughput handling. The platform integrates the T5835 tester with minimal-footprint test cells for high-speed, parallel final test of up to 1,536 advanced memory ICs. Two new additions to Advantest's lineup this year are the Independent Thermal Control (ITC) device interface board and the Engineering Thermal Chamber (ETC) for the MPT3000. Both provide QA and R&D teams with advanced, accurate thermal control on a per-DUT level during device characterization or small lot production testing, helping QA and engineering teams to characterize and qualify Gen 5 products, including SSDs and CXL memory solutions. Both extend MPT3000's feature set to a wider set of use cases. Announcement • Jun 21
Advantest Corporation to Exhibit Latest IC Test Solutions at SEMICON China, June 29- July 1 in Shanghai Advantest Corporation will feature its latest test solutions at SEMICON China 2023 on June 29-July 1 at the Shanghai New International Expo Center in Shanghai. Under the theme "Beyond the Technology Horizon," Advantest will highlight its contributions to test technology, including advanced memory, 5G, AI, high-performance computing (HPC) and nanotechnology, as well as its ESG initiatives. Advantest's product showcase in booth #E3423 in Hall E3 will feature how the company is adding customer value to the evolving semiconductor value chain through its broad range of test solutions and services. This year's exhibit will include: EXA Scale EX test station for the V93000 platform, which increases tester capacity in IC engineering labs by four times without increased footprint, supporting a seamless transition of test content from lab to fab and lowering facility costs. DUT Scale Duo interface for the V93000 EXA Scale SoC test systems extends DUT board space for high-volume testing and is compatible with existing DUT boards. Link Scale channel cards for the V93000 platform that improve test coverage and boost throughput in high-quality testing of complex SoCs, adding software-based functional test and HSIO SCAN test capabilities. T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs. LCD HP multi-channel digitizer module that addresses high-accuracy and high-voltage measurement demands for testing emerging display driver ICs when combined with the T6391 test system. inteXcell, the first-ever fully integrated and unified test infrastructure to combine the T5835 tester into minimal-footprint test cells, ideal for advanced memory IC final testing. T5830ES memory test system that is highly flexible and offers all of the capabilities needed to perform wafer testing and final testing of price-sensitive flash memories. Announcement • Jun 16
Advantest Corporation to Report Q1, 2024 Results on Jul 26, 2023 Advantest Corporation announced that they will report Q1, 2024 results on Jul 26, 2023 Announcement • May 19
Advantest Corporation Declares Year End Dividend for the Year Ended March 31, 2023, Payable on June 5, 2023 Advantest Corporation declared year-end dividend of JPY 70.00 per share against JPY 70.00 per share paid a year ago. Effective date is June 5, 2023. Record date is March 31, 2023. Announcement • May 09
Advantest Corporation Ships 10,000th V93000 SoC Test System Advantest Corporation announced it has shipped its 10,000(th) V93000 system-on-chip (SoC) test system to longtime customer Infineon Technologies, the world's number one automotive semiconductor supplier. The milestone system is a V93000 configuration developed to address the diverse test needs of power, analog, microcontroller and sensor ICs used in automotive and microcontroller applications. Ever-increasing semiconductor content in today's automobiles is creating a pressing need for the V93000's combination of advanced test capabilities and leading cost-of-test savings. In the more than two decades since its introduction, the flexible, scalable V93000 has become Advantest's SoC test platform. The company offers a wide range of V93000 options together with complementary test instruments including universal analog and digital test cards, RF instrumentation and mixed-signal cards, and best-in-class DPS and floating-power VI cards as well as the user-friendly SmarTest system software environment. The newest V93000 offering is the EXA Scale generation system for testing a wide range of devices, from current and future generations of low-costInternet of Things (IoT) chips to high-end automotive devices, highly integrated multicore processors, and advanced digital ICs up to the exascale performance class. Announcement • Jan 25
Advantest Corporation to Showcase Latest Semiconductor Test Solutions At SEMICON Korea Advantest Corporation will feature its latest test solutions for advanced ICs at SEMICON Korea on Feb. 1-3 at COEX in Seoul, South Korea. The company will highlight its contributions to leading-edge test technology, including advanced memory, 5G, AI, high-performance computing (HPC) and nanotechnology, as well as its ESG initiatives. Exhibition: The company's product showcase in booth #C510 will feature how the company is adding customer value to the evolving semiconductor value chain through its broad range of test solutions and services. This year's digital displays will include: New inteXcell, first-ever fully integrated and unified test infrastructure to combine the T5835 tester into minimal-footprint test cells, ideal for advanced memory IC final testing; New E5620 Defect Review Scanning Electron Microscope (DR-SEM) for precision review and classification of ultra-small photomask defects; New XPS128+HV universal VI and power supply card for V93000 EXA Scale SoC test system that lowers the cost of test for power management ICs and other high-voltage devices; New DUT Scale Duo interface for the V93000 EXA Scale SoC test systems extends DUT board space for high-volume testing and is compatible with existing DUT boards; New LCD HP multi-channel digitizer module that addresses high-accuracy and high-voltage measurement demands for testing emerging display driver ICs when combined with the T6391 SoC tester; T2000 SoC test systems with improving Rapid Development Kit (RDK) usability, which accelerates test program development for all SoCs, including complex automotive and power analog applications; MPT3000 solid state drive (SSD) test systems addressing test requirements associated with PCI Express fifth generation (PCIe Gen 5), Compute Express Link™ (CXL™) and NVMe SSDs. Announcement • Dec 16
Advantest Corporation to Report Q3, 2023 Results on Jan 31, 2023 Advantest Corporation announced that they will report Q3, 2023 results on Jan 31, 2023 Announcement • Jun 22
Advantest Corporation(TSE:6857) dropped from S&P Japan Mid Cap 100 Advantest Corporation(TSE:6857) dropped from S&P Japan Mid Cap 100 